diff --git a/openfpga_flow/tasks/fpga_verilog/adder/soft_adder/config/task.conf b/openfpga_flow/tasks/fpga_verilog/adder/soft_adder/config/task.conf
index 8a94c37ea..93f0c2d6a 100644
--- a/openfpga_flow/tasks/fpga_verilog/adder/soft_adder/config/task.conf
+++ b/openfpga_flow/tasks/fpga_verilog/adder/soft_adder/config/task.conf
@@ -26,7 +26,7 @@ external_fabric_key_file=
 arch0=${PATH:OPENFPGA_PATH}/openfpga_flow/vpr_arch/k4_frac_N8_tileable_reset_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm.xml
 
 [BENCHMARKS]
-bench0=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/micro_benchmark/adder_8/adder_8.blif
+bench0=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/micro_benchmark/adder_8/adder_8.eblif
 
 [SYNTHESIS_PARAM]
 bench0_top = and2