deploy the fabric/testbench generation only cases to travis
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@ -105,6 +105,12 @@ python3 openfpga_flow/scripts/run_fpga_task.py openfpga_shell/duplicated_grid_pi
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echo -e "Testing Verilog generation with spy output pads";
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python3 openfpga_flow/scripts/run_fpga_task.py openfpga_shell/spypad --debug --show_thread_logs
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echo -e "Testing fabric Verilog generation only";
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python3 openfpga_flow/scripts/run_fpga_task.py openfpga_shell/generate_fabric --debug --show_thread_logs
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echo -e "Testing Verilog testbench generation only";
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python3 openfpga_flow/scripts/run_fpga_task.py openfpga_shell/generate_testbench --debug --show_thread_logs
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# Verify MCNC big20 benchmark suite with ModelSim
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# Please make sure you have ModelSim installed in the environment
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# Otherwise, it will fail
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