[lib] fixed some compilation bugs

libopenfpga/libpcf/src/io/pcf.cpp

@@ -8,7 +8,17 @@
 #include <vector>
 #include <algorithm>
 #include <map>
-#include "main.h"
+#include <climits>
+
+bool VERBOSE_V_MODE = true;
+struct PCFlayout {
+    std::string pinName;        //with the [7:0] bitfield(maybe)
+    int pinNameBit = 0;
+    std::string pinNameBase;    //without the bitfield
+    std::string pinNum;
+    int pinNumInt;
+    std::string comment;
+};
 
 #define TEST_PRINT_PCFREAD_CHECK 0
 

libopenfpga/libpcf/src/io/verilog.cpp

@@ -8,7 +8,26 @@
 #include <vector>
 #include <algorithm>
 #include <map>
-#include "main.h"
+#include <climits>
+
+struct PCFlayout {
+    std::string pinName;        //with the [7:0] bitfield(maybe)
+    int pinNameBit = 0;
+    std::string pinNameBase;    //without the bitfield
+    std::string pinNum;
+    int pinNumInt;
+    std::string comment;
+};
+
+struct Veriloglayout {
+    std::string inpout;
+    std::string bitfield;
+    int bits = 1;
+    int hibit = INT_MAX;
+    int lobit = 0;
+    std::string pinName;
+    std::string comment;
+};
 
 #define TEST_PRINT_VERILOG_CHECK 0
 #define TEST_PCFMAP_PIN_COUNT 0
@@ -143,4 +162,4 @@ bool comparePCFtoVerilog(std::vector<PCFlayout> &v1, std::vector<Veriloglayout>
     }
 
     return hasMismatches;
-}
+}