[core] detailed messages to trace why some nets are no sync
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@ -177,20 +177,26 @@ static void synchronize_primitive_physical_pb_atom_nets(
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const AtomContext& atom_ctx, const AtomBlockId& atom_blk,
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const VprDeviceAnnotation& device_annotation, const bool& verbose) {
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/* Iterate over all the ports: input, output and clock */
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VTR_LOGV(verbose, "Synchronizing atom nets on pb_graph_node '%s'...\n",
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pb_graph_node->hierarchical_type_name().c_str());
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for (int iport = 0; iport < pb_graph_node->num_input_ports; ++iport) {
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for (int ipin = 0; ipin < pb_graph_node->num_input_pins[iport]; ++ipin) {
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/* Port exists (some LUTs may have no input and hence no port in the atom
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* netlist) */
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VTR_LOGV(verbose, "Synchronizing atom nets on pb_graph_pin '%s'...\n",
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pb_graph_node->input_pins[iport][ipin].to_string().c_str());
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t_model_ports* model_port =
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pb_graph_node->input_pins[iport][ipin].port->model_port;
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if (nullptr == model_port) {
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VTR_LOGV(verbose, "Skip due to empty model port\n");
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continue;
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}
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AtomPortId atom_port =
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atom_ctx.nlist.find_atom_port(atom_blk, model_port);
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if (!atom_port) {
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VTR_LOGV(verbose, "Skip due to invalid port\n");
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continue;
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}
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/* Find the atom nets mapped to the pin
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@ -207,15 +213,19 @@ static void synchronize_primitive_physical_pb_atom_nets(
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for (int ipin = 0; ipin < pb_graph_node->num_output_pins[iport]; ++ipin) {
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/* Port exists (some LUTs may have no input and hence no port in the atom
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* netlist) */
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VTR_LOGV(verbose, "Synchronizing atom nets on pb_graph_pin '%s'...\n",
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pb_graph_node->output_pins[iport][ipin].to_string().c_str());
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t_model_ports* model_port =
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pb_graph_node->output_pins[iport][ipin].port->model_port;
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if (nullptr == model_port) {
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VTR_LOGV(verbose, "Skip due to empty model port\n");
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continue;
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}
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AtomPortId atom_port =
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atom_ctx.nlist.find_atom_port(atom_blk, model_port);
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if (!atom_port) {
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VTR_LOGV(verbose, "Skip due to invalid port\n");
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continue;
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}
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/* Find the atom nets mapped to the pin
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@ -232,15 +242,19 @@ static void synchronize_primitive_physical_pb_atom_nets(
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for (int ipin = 0; ipin < pb_graph_node->num_clock_pins[iport]; ++ipin) {
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/* Port exists (some LUTs may have no input and hence no port in the atom
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* netlist) */
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VTR_LOGV(verbose, "Synchronizing atom nets on pb_graph_pin '%s'...\n",
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pb_graph_node->clock_pins[iport][ipin].to_string().c_str());
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t_model_ports* model_port =
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pb_graph_node->clock_pins[iport][ipin].port->model_port;
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if (nullptr == model_port) {
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VTR_LOGV(verbose, "Skip due to empty model port\n");
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continue;
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}
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AtomPortId atom_port =
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atom_ctx.nlist.find_atom_port(atom_blk, model_port);
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if (!atom_port) {
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VTR_LOGV(verbose, "Skip due to invalid port\n");
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continue;
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}
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/* Find the atom nets mapped to the pin
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