From 576b9c2d8f00ef9c6b0a664cab7c1cf31a6461e8 Mon Sep 17 00:00:00 2001 From: tangxifan Date: Sun, 20 Mar 2022 11:05:29 +0800 Subject: [PATCH] [Script] Disable SDC writer in multiclock examples --- .../global_tile_multiclock_example_script.openfpga | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/openfpga_flow/openfpga_shell_scripts/global_tile_multiclock_example_script.openfpga b/openfpga_flow/openfpga_shell_scripts/global_tile_multiclock_example_script.openfpga index 1b1daae4d..de2ca6cbd 100644 --- a/openfpga_flow/openfpga_shell_scripts/global_tile_multiclock_example_script.openfpga +++ b/openfpga_flow/openfpga_shell_scripts/global_tile_multiclock_example_script.openfpga @@ -72,7 +72,9 @@ write_pnr_sdc --file ./SDC write_sdc_disable_timing_configure_ports --file ./SDC/disable_configure_ports.sdc # Write the SDC to run timing analysis for a mapped FPGA fabric -write_analysis_sdc --file ./SDC_analysis +# TODO: Currently SDC writer only supports 1 operating clock due to +# - Missing information about which I/O is constrained by which clock +#write_analysis_sdc --file ./SDC_analysis # Finish and exit OpenFPGA exit