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[Documentation] Fix format in table

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tangxifan 2020-10-06 12:02:15 -06:00
parent c8339fc473
commit 56ab63d939
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docs/source/manual/fpga_verilog/testbench.rst
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@ -11,7 +11,7 @@ In this part, we will introduce the hierarchy, dependency and functionality of e
| Full | Long | Random Stimuli | Full fabric | | Full | Long | Random Stimuli | Full fabric |
+-----------------+---------+----------------+---------------+ +-----------------+---------+----------------+---------------+
| Formal-oriented | Short | Random Stimuli | Programmable | | Formal-oriented | Short | Random Stimuli | Programmable |
| | | or | fabric only | | | | | fabric only |
| | | Formal Method | | | | | Formal Method | |
+-----------------+---------+----------------+---------------+ +-----------------+---------+----------------+---------------+