riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

use sorted edges in building routing modules

This commit is contained in:
tangxifan 2020-03-08 15:31:41 -06:00
parent 7a7f8374b3
commit 5558932762
3 changed files with 25 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
openfpga/src/fabric/build_routing_module_utils.cpp
View File

@ -17,6 +17,25 @@
/* begin namespace openfpga */
namespace openfpga {
/************************************************************************
* Find the configurable driver nodes for a node in the rr_graph
***********************************************************************/
std::vector<RRNodeId> get_rr_gsb_chan_node_configurable_driver_nodes(const RRGraph& rr_graph,
const RRGSB& rr_gsb,
const e_side& chan_side,
const size_t& track_id) {
std::vector<RRNodeId> driver_nodes;
for (const RREdgeId& edge : rr_gsb.get_chan_node_in_edges(rr_graph, chan_side, track_id)) {
/* Bypass non-configurable edges */
if (false == rr_graph.edge_is_configurable(edge)) {
continue;
}
driver_nodes.push_back(rr_graph.edge_src_node(edge));
}
return driver_nodes;
}
/*********************************************************************
* Generate a port for a routing track of a swtich block
********************************************************************/

5
openfpga/src/fabric/build_routing_module_utils.h
View File

@ -17,6 +17,11 @@
/* begin namespace openfpga */
namespace openfpga {
std::vector<RRNodeId> get_rr_gsb_chan_node_configurable_driver_nodes(const RRGraph& rr_graph,
const RRGSB& rr_gsb,
const e_side& chan_side,
const size_t& track_id);
ModulePortId find_switch_block_module_chan_port(const ModuleManager& module_manager,
const ModuleId& sb_module,
const RRGraph& rr_graph,

2
openfpga/src/fabric/build_routing_modules.cpp
View File

@ -227,7 +227,7 @@ void build_switch_block_interc_modules(ModuleManager& module_manager,
/* Determine if the interc lies inside a channel wire, that is interc between segments */
if (false == rr_gsb.is_sb_node_passing_wire(rr_graph, chan_side, chan_node_id)) {
driver_rr_nodes = get_rr_graph_configurable_driver_nodes(rr_graph, cur_rr_node);
driver_rr_nodes = get_rr_gsb_chan_node_configurable_driver_nodes(rr_graph, rr_gsb, chan_side, chan_node_id);
/* Special: if there are zero-driver nodes. We skip here */
if (0 == driver_rr_nodes.size()) {
return;