use sorted edges in building routing modules

openfpga/src/fabric/build_routing_module_utils.cpp

@@ -17,6 +17,25 @@
 /* begin namespace openfpga */
 namespace openfpga {
 
+/************************************************************************
+ * Find the configurable driver nodes for a node in the rr_graph
+ ***********************************************************************/
+std::vector<RRNodeId> get_rr_gsb_chan_node_configurable_driver_nodes(const RRGraph& rr_graph,
+                                                                     const RRGSB& rr_gsb,
+                                                                     const e_side& chan_side,
+                                                                     const size_t& track_id) {
+  std::vector<RRNodeId> driver_nodes;
+  for (const RREdgeId& edge : rr_gsb.get_chan_node_in_edges(rr_graph, chan_side, track_id)) {
+    /* Bypass non-configurable edges */
+    if (false == rr_graph.edge_is_configurable(edge)) {
+      continue;
+    } 
+    driver_nodes.push_back(rr_graph.edge_src_node(edge));
+  }
+
+  return driver_nodes;
+}
+
 /*********************************************************************
  * Generate a port for a routing track of a swtich block
  ********************************************************************/

openfpga/src/fabric/build_routing_module_utils.h

@@ -17,6 +17,11 @@
 /* begin namespace openfpga */
 namespace openfpga {
 
+std::vector<RRNodeId> get_rr_gsb_chan_node_configurable_driver_nodes(const RRGraph& rr_graph,
+                                                                     const RRGSB& rr_gsb,
+                                                                     const e_side& chan_side,
+                                                                     const size_t& track_id);
+
 ModulePortId find_switch_block_module_chan_port(const ModuleManager& module_manager, 
                                                 const ModuleId& sb_module,
                                                 const RRGraph& rr_graph,

openfpga/src/fabric/build_routing_modules.cpp

@@ -227,7 +227,7 @@ void build_switch_block_interc_modules(ModuleManager& module_manager,
 
   /* Determine if the interc lies inside a channel wire, that is interc between segments */
   if (false == rr_gsb.is_sb_node_passing_wire(rr_graph, chan_side, chan_node_id)) {
-    driver_rr_nodes = get_rr_graph_configurable_driver_nodes(rr_graph, cur_rr_node);
+    driver_rr_nodes = get_rr_gsb_chan_node_configurable_driver_nodes(rr_graph, rr_gsb, chan_side, chan_node_id);
     /* Special: if there are zero-driver nodes. We skip here */
     if (0 == driver_rr_nodes.size()) {
       return;