[core] fixed a bug on messed up wire connections for OPINs

2024-05-20 13:50:31 -07:00 · 2024-05-20 13:50:31 -07:00 · 52ae484a7c
parent 807c37d3ff
commit 52ae484a7c
1 changed files with 0 additions and 2 deletions
--- a/openfpga/src/fabric/build_routing_modules.cpp
+++ b/openfpga/src/fabric/build_routing_modules.cpp
@ -1059,8 +1059,6 @@ static void build_connection_block_module(
  for (ModulePortId opin_module_port_id : opin_module_port_ids) {
    ModuleNetId net = create_module_source_pin_net(
      module_manager, cb_module, cb_module, 0, opin_module_port_id, 0);
-    module_manager.add_module_net_sink(cb_module, net, cb_module, 0,
-                                       opin_module_port_id, 0);
    /* Cache the module net */
    input_port_to_module_nets[ModulePinInfo(opin_module_port_id, 0)] = net;
  }