[test] force a fixed routing chan W for no time stamp test case
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@ -2,7 +2,7 @@
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# This script is designed to test the option --no_time_stamp in related commands
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# This script is designed to test the option --no_time_stamp in related commands
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# It can NOT be used an example script to achieve other objectives
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# It can NOT be used an example script to achieve other objectives
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#--write_rr_graph example_rr_graph.xml
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#--write_rr_graph example_rr_graph.xml
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vpr ${VPR_ARCH_FILE} ${VPR_TESTBENCH_BLIF} --clock_modeling route
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vpr ${VPR_ARCH_FILE} ${VPR_TESTBENCH_BLIF} --route_chan_width ${OPENFPGA_VPR_ROUTE_CHAN_WIDTH} --clock_modeling route
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# Read OpenFPGA architecture definition
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# Read OpenFPGA architecture definition
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read_openfpga_arch -f ${OPENFPGA_ARCH_FILE}
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read_openfpga_arch -f ${OPENFPGA_ARCH_FILE}
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@ -19,6 +19,7 @@ fpga_flow=yosys_vpr
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openfpga_shell_template=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_shell_scripts/no_time_stamp_example_script.openfpga
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openfpga_shell_template=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_shell_scripts/no_time_stamp_example_script.openfpga
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openfpga_arch_file=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_arch/k4_N4_40nm_cc_openfpga.xml
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openfpga_arch_file=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_arch/k4_N4_40nm_cc_openfpga.xml
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openfpga_sim_setting_file=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_simulation_settings/auto_sim_openfpga.xml
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openfpga_sim_setting_file=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_simulation_settings/auto_sim_openfpga.xml
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openfpga_vpr_route_chan_width = 26
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openfpga_output_dir=${PATH:TASK_DIR}/golden_outputs_no_time_stamp
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openfpga_output_dir=${PATH:TASK_DIR}/golden_outputs_no_time_stamp
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[ARCHITECTURES]
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[ARCHITECTURES]
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