From 50c14e8056b9c2fda59ec1f0e17fe3a0baef05c0 Mon Sep 17 00:00:00 2001 From: Tarachand Pagarani Date: Fri, 17 Dec 2021 07:29:02 -0800 Subject: [PATCH] fix CI failures --- openfpga_flow/scripts/run_fpga_flow.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openfpga_flow/scripts/run_fpga_flow.py b/openfpga_flow/scripts/run_fpga_flow.py index 6bc23c136..dd92a6d61 100644 --- a/openfpga_flow/scripts/run_fpga_flow.py +++ b/openfpga_flow/scripts/run_fpga_flow.py @@ -498,7 +498,7 @@ def create_yosys_params(): yosys_args, ExtraArgs = yosysargparser.parse_known_args(yosys_args) if not args.verific: - if yosys_args.family == "qlf_k6n10f": + if yosys_arg == 1 and yosys_args.family == "qlf_k6n10f": ys_params["READ_VERILOG_FILE"] = " \n".join([ "read_verilog " + shlex.quote(eachfile) for eachfile in args.benchmark_files])