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[core] add more debugging message

This commit is contained in:
tangxifan 2024-06-29 10:54:08 -07:00
parent 5fa674be24
commit 4f787a5cfc
1 changed files with 2 additions and 0 deletions
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2
openfpga/src/annotation/route_clock_rr_graph.cpp
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@ -68,6 +68,8 @@ static int build_clock_tree_net_map(
/* TODO: Check the tree_pin.get_name(), see if matches the tree from ports */ /* TODO: Check the tree_pin.get_name(), see if matches the tree from ports */
/* Register the pin mapping */ /* Register the pin mapping */
tree2clk_pin_map[ClockTreePinId(tree_pin.get_lsb())] = gnet; tree2clk_pin_map[ClockTreePinId(tree_pin.get_lsb())] = gnet;
VTR_LOGV(verbose, "Mapped net '%s' to pin '%s' of clock tree '%s'.\n",
gnet_name.c_str(), tree_pin.to_verilog_string().c_str(), clk_ntwk.tree_name(clk_tree).c_str());
} }
} }