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[Tool] Capsulate fabric bitstream organization for configuration chain

This commit is contained in:
tangxifan 2021-04-10 14:28:31 -06:00
parent afa0e751da
commit 4b8f5f294a
3 changed files with 44 additions and 18 deletions
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19
openfpga/src/fpga_verilog/verilog_top_testbench.cpp
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@ -1484,24 +1484,7 @@ void print_verilog_top_testbench_configuration_chain_bitstream(std::fstream& fp,
VTR_ASSERT(num_bits_to_skip < regional_bitstream_max_size);
/* Reorganize the regional bitstreams to be the same size */
std::vector<std::vector<bool>> regional_bitstreams;
regional_bitstreams.reserve(fabric_bitstream.regions().size());
for (const FabricBitRegionId& region : fabric_bitstream.regions()) {
std::vector<bool> curr_regional_bitstream;
curr_regional_bitstream.resize(regional_bitstream_max_size, false);
/* Starting index should consider the offset between the current bitstream size and
* the maximum size of regional bitstream
*/
size_t offset = regional_bitstream_max_size - fabric_bitstream.region_bits(region).size();
for (const FabricBitId& bit_id : fabric_bitstream.region_bits(region)) {
curr_regional_bitstream[offset] = bitstream_manager.bit_value(fabric_bitstream.config_bit(bit_id));
offset++;
}
VTR_ASSERT(offset == regional_bitstream_max_size);
/* Add the adapt sub-bitstream */
regional_bitstreams.push_back(curr_regional_bitstream);
}
ConfigChainFabricBitstream regional_bitstreams = build_config_chain_fabric_bitstream_by_region(bitstream_manager, fabric_bitstream);
/* Attention: when the fast configuration is enabled, we will start from the first bit '1'
* This requires a reset signal (as we forced in the first clock cycle)

37
openfpga/src/utils/fabric_bitstream_utils.cpp
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@ -67,6 +67,43 @@ size_t find_configuration_chain_fabric_bitstream_size_to_be_skipped(const Fabric
return num_bits_to_skip;
}
/********************************************************************
* Build a fabric bitstream which can be directly loaded to a configuration
* chain (either single-head or multi-bit)
* We will organize the bitstreams in each region and align them
* Logic '0' bits may be deposited to those bitstream whose length is smaller
* than the maximum bitstream among all the regions
* For example:
* Region 0: 000000001111101010 <- max. bitstream length
* Region 1: 00000011010101 <- shorter bitstream than the max.; add zeros to the head
* Region 2: 0010101111000110 <- shorter bitstream than the max.; add zeros to the head
*******************************************************************/
ConfigChainFabricBitstream build_config_chain_fabric_bitstream_by_region(const BitstreamManager& bitstream_manager,
const FabricBitstream& fabric_bitstream) {
/* Find the longest bitstream */
size_t regional_bitstream_max_size = find_fabric_regional_bitstream_max_size(fabric_bitstream);
ConfigChainFabricBitstream regional_bitstreams;
regional_bitstreams.reserve(fabric_bitstream.regions().size());
for (const FabricBitRegionId& region : fabric_bitstream.regions()) {
std::vector<bool> curr_regional_bitstream;
curr_regional_bitstream.resize(regional_bitstream_max_size, false);
/* Starting index should consider the offset between the current bitstream size and
* the maximum size of regional bitstream
*/
size_t offset = regional_bitstream_max_size - fabric_bitstream.region_bits(region).size();
for (const FabricBitId& bit_id : fabric_bitstream.region_bits(region)) {
curr_regional_bitstream[offset] = bitstream_manager.bit_value(fabric_bitstream.config_bit(bit_id));
offset++;
}
VTR_ASSERT(offset == regional_bitstream_max_size);
/* Add the adapt sub-bitstream */
regional_bitstreams.push_back(curr_regional_bitstream);
}
return regional_bitstreams;
}
/********************************************************************
* Reorganize the fabric bitstream for frame-based protocol
* by the same address across regions:

6
openfpga/src/utils/fabric_bitstream_utils.h
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@ -24,6 +24,12 @@ size_t find_fabric_regional_bitstream_max_size(const FabricBitstream& fabric_bit
size_t find_configuration_chain_fabric_bitstream_size_to_be_skipped(const FabricBitstream& fabric_bitstream,
const BitstreamManager& bitstream_manager,
const bool& bit_value_to_skip);
/* Alias to a specific organization of bitstreams for frame-based configuration protocol */
typedef std::vector<std::vector<bool>> ConfigChainFabricBitstream;
ConfigChainFabricBitstream build_config_chain_fabric_bitstream_by_region(const BitstreamManager& bitstream_manager,
const FabricBitstream& fabric_bitstream);
/* Alias to a specific organization of bitstreams for frame-based configuration protocol */
typedef std::map<std::string, std::vector<bool>> FrameFabricBitstream;
FrameFabricBitstream build_frame_based_fabric_bitstream_by_address(const FabricBitstream& fabric_bitstream);