Update bug_report.md

.github/ISSUE_TEMPLATE/bug_report.md

@@ -9,16 +9,16 @@ assignees: ''
 
 **Describe the bug**
 A clear and concise description of what the bug is.
-
-Which part of OpenFPGA is buggy
-- [ ] Documentation
-- [ ] OpenFPGA flow
-- [ ] FPGA-Verilog
-- [ ] FPGA-Bitstream
-- [ ] FPGA-SDC
-- [ ] FPGA-SPICE
-- [ ] VPR
-- [ ] Yosys
+<!--- Uncomment relevant options --->
+<!-- Which part of OpenFPGA is buggy -->
+<!--- [ ] Documentation --->
+<!--- [ ] OpenFPGA flow --->
+<!--- [ ] FPGA-Verilog --->
+<!--- [ ] FPGA-Bitstream --->
+<!--- [ ] FPGA-SDC --->
+<!--- [ ] FPGA-SPICE --->
+<!--- [ ] VPR --->
+<!--- [ ] Yosys --->
 
 **To Reproduce**
 Steps to reproduce the behavior:
@@ -33,22 +33,23 @@ A clear and concise description of what you expected to happen.
 If applicable, add screenshots to help explain your problem.
 
 **Enviornment (please complete the following information):**
+<!--- Uncomment relevant options --->
  - OS: 
-   - [ ] CentOS 7
-   - [ ] Ubuntu 18.04
-   - [ ] Others. If so, please specify:
+<!---    - [ ] CentOS 7 --->
+<!---    - [ ] Ubuntu 18.04 --->
+<!---    - [ ] Others. If so, please specify: --->
  - Compiler
-   - [ ] gcc-5
-   - [ ] gcc-6
-   - [ ] gcc-7
-   - [ ] gcc-8
-   - [ ] gcc-9
-   - [ ] clang-6
-   - [ ] clang-8
-   - [ ] Others. If so, please specify:
+<!---    - [ ] gcc-5 --->
+<!---    - [ ] gcc-6 --->
+<!---    - [ ] gcc-7 --->
+<!---    - [ ] gcc-8 --->
+<!---    - [ ] gcc-9 --->
+<!---    - [ ] clang-6 --->
+<!---    - [ ] clang-8 --->
+<!---    - [ ] Others. If so, please specify: --->
  - Version
-   - [ ] Current master
-   - [ ] Others. If so, please specify Github commit id: 
+<!---    - [ ] Current master --->
+<!---    - [ ] Others. If so, please specify Github commit id:  --->
 
 **Additional context**
 Add any other context about the problem here.