adapt rr_graph builder utilized functions and move rr_graph utils from openfpga to vpr
This commit is contained in:
tangxifan
parent
524798799c
commit
4b7d2221d1
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@ -5,6 +5,9 @@
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#include <algorithm>
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#include "chan_node_details.h"
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/* begin namespace openfpga */
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namespace openfpga {
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/************************************************************************
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* Constructors
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***********************************************************************/
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@ -290,3 +293,4 @@ bool ChanNodeDetails::validate_track_id(const size_t& track_id) const {
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return false;
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}
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} /* end namespace openfpga */
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@ -1,3 +1,12 @@
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#ifndef CHAN_NODE_DETAILS_H
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#define CHAN_NODE_DETAILS_H
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/********************************************************************
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* Include header files that are required by function declaration
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*******************************************************************/
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#include <vector>
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#include "vpr_types.h"
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/************************************************************************
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* This file contains a class to model the details of routing node
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* in a channel:
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@ -7,22 +16,8 @@
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* 4. potentail track_id(ptc_num) of each segment
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***********************************************************************/
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/* IMPORTANT:
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* The following preprocessing flags are added to
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* avoid compilation error when this headers are included in more than 1 times
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*/
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#ifndef CHAN_NODE_DETAILS_H
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#define CHAN_NODE_DETAILS_H
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/*
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* Notes in include header files in a head file
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* Only include the neccessary header files
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* that is required by the data types in the function/class declarations!
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*/
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/* Header files should be included in a sequence */
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/* Standard header files required go first */
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#include <vector>
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#include "vpr_types.h"
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/* begin namespace openfpga */
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namespace openfpga {
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/************************************************************************
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* ChanNodeDetails records segment length, directionality and starting of routing tracks
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@ -33,7 +28,6 @@
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* +---------------------------------+
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***********************************************************************/
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class ChanNodeDetails {
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public : /* Constructor */
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ChanNodeDetails(const ChanNodeDetails&); /* Duplication */
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@ -76,5 +70,6 @@ class ChanNodeDetails {
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std::vector<bool> track_end_; /* flag to identify if this is the ending point of the track */
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};
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#endif
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} /* end namespace openfpga */
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#endif
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@ -0,0 +1,289 @@
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/************************************************************************
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* This file contains most utilized functions for rr_graph builders
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***********************************************************************/
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#include <vector>
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#include <algorithm>
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/* Headers from vtrutil library */
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#include "vtr_assert.h"
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#include "vtr_log.h"
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#include "vpr_utils.h"
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#include "rr_graph_builder_utils.h"
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/* begin namespace openfpga */
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namespace openfpga {
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/************************************************************************
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* Get the class index of a grid pin
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***********************************************************************/
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int get_grid_pin_class_index(const t_grid_tile& cur_grid,
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const int pin_index) {
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/* check */
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VTR_ASSERT(pin_index < cur_grid.type->num_pins);
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return cur_grid.type->pin_class[pin_index];
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}
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/* Deteremine the side of a io grid */
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e_side determine_io_grid_pin_side(const vtr::Point<size_t>& device_size,
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const vtr::Point<size_t>& grid_coordinate) {
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/* TOP side IO of FPGA */
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if (device_size.y() == grid_coordinate.y()) {
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return BOTTOM; /* Such I/O has only Bottom side pins */
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} else if (device_size.x() == grid_coordinate.x()) { /* RIGHT side IO of FPGA */
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return LEFT; /* Such I/O has only Left side pins */
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} else if (0 == grid_coordinate.y()) { /* BOTTOM side IO of FPGA */
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return TOP; /* Such I/O has only Top side pins */
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} else if (0 == grid_coordinate.x()) { /* LEFT side IO of FPGA */
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return RIGHT; /* Such I/O has only Right side pins */
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} else {
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VTR_LOGF_ERROR(__FILE__, __LINE__,
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"I/O Grid is in the center part of FPGA! Currently unsupported!\n");
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exit(1);
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}
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}
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/************************************************************************
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* Get a list of pin_index for a grid (either OPIN or IPIN)
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* For IO_TYPE, only one side will be used, we consider one side of pins
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* For others, we consider all the sides
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***********************************************************************/
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std::vector<int> get_grid_side_pins(const t_grid_tile& cur_grid,
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const e_pin_type& pin_type,
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const e_side& pin_side,
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const int& pin_width,
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const int& pin_height) {
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std::vector<int> pin_list;
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/* Make sure a clear start */
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pin_list.clear();
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for (int ipin = 0; ipin < cur_grid.type->num_pins; ++ipin) {
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int class_id = cur_grid.type->pin_class[ipin];
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if ( (1 == cur_grid.type->pinloc[pin_width][pin_height][pin_side][ipin])
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&& (pin_type == cur_grid.type->class_inf[class_id].type) ) {
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pin_list.push_back(ipin);
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}
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}
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return pin_list;
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}
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/************************************************************************
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* Get the number of pins for a grid (either OPIN or IPIN)
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* For IO_TYPE, only one side will be used, we consider one side of pins
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* For others, we consider all the sides
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***********************************************************************/
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size_t get_grid_num_pins(const t_grid_tile& cur_grid,
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const e_pin_type& pin_type,
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const e_side& io_side) {
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size_t num_pins = 0;
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/* For IO_TYPE sides */
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for (const e_side& side : {TOP, RIGHT, BOTTOM, LEFT}) {
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/* skip unwanted sides */
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if ( (true == is_io_type(cur_grid.type))
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&& (side != io_side) ) {
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continue;
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}
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/* Get pin list */
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for (int width = 0; width < cur_grid.type->width; ++width) {
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for (int height = 0; height < cur_grid.type->height; ++height) {
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std::vector<int> pin_list = get_grid_side_pins(cur_grid, pin_type, side, width, height);
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num_pins += pin_list.size();
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}
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}
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}
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return num_pins;
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}
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/************************************************************************
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* Get the number of pins for a grid (either OPIN or IPIN)
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* For IO_TYPE, only one side will be used, we consider one side of pins
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* For others, we consider all the sides
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***********************************************************************/
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size_t get_grid_num_classes(const t_grid_tile& cur_grid,
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const e_pin_type& pin_type) {
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size_t num_classes = 0;
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for (int iclass = 0; iclass < cur_grid.type->num_class; ++iclass) {
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/* Bypass unmatched pin_type */
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if (pin_type != cur_grid.type->class_inf[iclass].type) {
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continue;
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}
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num_classes++;
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}
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return num_classes;
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}
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/************************************************************************
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* Get the track_id of a routing track w.r.t its coordinator
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* In tileable routing architecture, the track_id changes SB by SB.
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* Therefore the track_ids are stored in a vector, indexed by the relative coordinator
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* based on the starting point of the track
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* For routing tracks in INC_DIRECTION
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* (xlow, ylow) should be the starting point
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*
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* (xlow, ylow) (xhigh, yhigh)
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* track_id[0] -------------------------------> track_id[xhigh - xlow + yhigh - ylow]
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*
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* For routing tracks in DEC_DIRECTION
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* (xhigh, yhigh) should be the starting point
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*
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* (xlow, ylow) (xhigh, yhigh)
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* track_id[0] <------------------------------- track_id[xhigh - xlow + yhigh - ylow]
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*
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*
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***********************************************************************/
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short get_rr_node_actual_track_id(const RRGraph& rr_graph,
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const RRNodeId& track_rr_node,
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const vtr::Point<size_t>& coord,
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const vtr::vector<RRNodeId, std::vector<size_t>>& tileable_rr_graph_node_track_ids) {
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vtr::Point<size_t> low_coord(rr_graph.node_xlow(track_rr_node), rr_graph.node_ylow(track_rr_node));
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size_t offset = (int)abs((int)coord.x() - (int)low_coord.x() + (int)coord.y() - (int)low_coord.y());
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return tileable_rr_graph_node_track_ids[track_rr_node][offset];
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}
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/************************************************************************
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* Get the ptc of a routing track in the channel where it ends
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* For routing tracks in INC_DIRECTION
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* the ptc is the last of track_ids
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*
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* For routing tracks in DEC_DIRECTION
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* the ptc is the first of track_ids
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***********************************************************************/
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short get_track_rr_node_end_track_id(const RRGraph& rr_graph,
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const RRNodeId& track_rr_node,
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const vtr::vector<RRNodeId, std::vector<size_t>>& tileable_rr_graph_node_track_ids) {
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/* Make sure we have CHANX or CHANY */
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VTR_ASSERT( (CHANX == rr_graph.node_type(track_rr_node))
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|| (CHANY == rr_graph.node_type(track_rr_node)) );
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if (INC_DIRECTION == rr_graph.node_direction(track_rr_node)) {
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return tileable_rr_graph_node_track_ids[track_rr_node].back();
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}
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VTR_ASSERT(DEC_DIRECTION == rr_graph.node_direction(track_rr_node));
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return tileable_rr_graph_node_track_ids[track_rr_node].front();
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}
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/************************************************************************
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* Find the number of nodes in the same class
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* in a routing resource graph
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************************************************************************/
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short find_rr_graph_num_nodes(const RRGraph& rr_graph,
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const std::vector<t_rr_type>& node_types) {
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short counter = 0;
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for (const RRNodeId& node : rr_graph.nodes()) {
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/* Bypass the nodes not in the class */
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if (node_types.end() == std::find(node_types.begin(), node_types.end(), rr_graph.node_type(node))) {
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continue;
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}
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counter++;
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}
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return counter;
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}
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/************************************************************************
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* Find the maximum fan-in for a given class of nodes
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* in a routing resource graph
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************************************************************************/
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short find_rr_graph_max_fan_in(const RRGraph& rr_graph,
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const std::vector<t_rr_type>& node_types) {
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short max_fan_in = 0;
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for (const RRNodeId& node : rr_graph.nodes()) {
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/* Bypass the nodes not in the class */
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if (node_types.end() == std::find(node_types.begin(), node_types.end(), rr_graph.node_type(node))) {
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continue;
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}
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max_fan_in = std::max(rr_graph.node_fan_in(node), max_fan_in);
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}
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return max_fan_in;
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}
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/************************************************************************
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* Find the minimum fan-in for a given class of nodes
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* in a routing resource graph
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************************************************************************/
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short find_rr_graph_min_fan_in(const RRGraph& rr_graph,
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const std::vector<t_rr_type>& node_types) {
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short min_fan_in = 0;
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for (const RRNodeId& node : rr_graph.nodes()) {
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/* Bypass the nodes not in the class */
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if (node_types.end() == std::find(node_types.begin(), node_types.end(), rr_graph.node_type(node))) {
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continue;
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}
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min_fan_in = std::min(rr_graph.node_fan_in(node), min_fan_in);
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}
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return min_fan_in;
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}
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/************************************************************************
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* Find the average fan-in for a given class of nodes
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* in a routing resource graph
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************************************************************************/
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short find_rr_graph_average_fan_in(const RRGraph& rr_graph,
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const std::vector<t_rr_type>& node_types) {
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/* Get the maximum SB mux size */
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size_t sum = 0;
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size_t counter = 0;
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for (const RRNodeId& node : rr_graph.nodes()) {
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/* Bypass the nodes not in the class */
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if (node_types.end() == std::find(node_types.begin(), node_types.end(), rr_graph.node_type(node))) {
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continue;
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}
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sum += rr_graph.node_fan_in(node);
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counter++;
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}
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return sum / counter;
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}
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/************************************************************************
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* Print statistics of multiplexers in a routing resource graph
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************************************************************************/
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void print_rr_graph_mux_stats(const RRGraph& rr_graph) {
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/* Print MUX size distribution */
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std::vector<t_rr_type> sb_node_types;
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sb_node_types.push_back(CHANX);
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sb_node_types.push_back(CHANY);
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/* Print statistics */
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VTR_LOG("------------------------------------------------\n");
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VTR_LOG("Total No. of Switch Block multiplexer size: %d\n",
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find_rr_graph_num_nodes(rr_graph, sb_node_types));
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VTR_LOG("Maximum Switch Block multiplexer size: %d\n",
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find_rr_graph_max_fan_in(rr_graph, sb_node_types));
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VTR_LOG("Minimum Switch Block multiplexer size: %d\n",
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find_rr_graph_min_fan_in(rr_graph, sb_node_types));
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VTR_LOG("Average Switch Block multiplexer size: %lu\n",
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find_rr_graph_average_fan_in(rr_graph, sb_node_types));
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VTR_LOG("------------------------------------------------\n");
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/* Get the maximum CB mux size */
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std::vector<t_rr_type> cb_node_types(1, IPIN);
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VTR_LOG("------------------------------------------------\n");
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VTR_LOG("Total No. of Connection Block Multiplexer size: %d\n",
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find_rr_graph_num_nodes(rr_graph, cb_node_types));
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VTR_LOG("Maximum Connection Block Multiplexer size: %d\n",
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find_rr_graph_max_fan_in(rr_graph, cb_node_types));
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VTR_LOG("Minimum Connection Block Multiplexer size: %d\n",
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find_rr_graph_min_fan_in(rr_graph, cb_node_types));
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VTR_LOG("Average Connection Block Multiplexer size: %lu\n",
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find_rr_graph_average_fan_in(rr_graph, cb_node_types));
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VTR_LOG("------------------------------------------------\n");
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}
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} /* end namespace openfpga */
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@ -0,0 +1,69 @@
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#ifndef RR_GRAPH_BUILDER_UTILS_H
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#define RR_GRAPH_BUILDER_UTILS_H
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/********************************************************************
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* Include header files that are required by function declaration
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*******************************************************************/
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#include "device_grid.h"
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#include "rr_graph_obj.h"
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#include "vtr_geometry.h"
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/********************************************************************
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* Function declaration
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*******************************************************************/
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/* begin namespace openfpga */
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namespace openfpga {
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int get_grid_pin_class_index(const t_grid_tile& cur_grid,
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const int pin_index);
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e_side determine_io_grid_pin_side(const vtr::Point<size_t>& device_size,
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const vtr::Point<size_t>& grid_coordinate);
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std::vector<int> get_grid_side_pins(const t_grid_tile& cur_grid,
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const e_pin_type& pin_type,
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const e_side& pin_side,
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const int& pin_width,
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const int& pin_height);
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size_t get_grid_num_pins(const t_grid_tile& cur_grid,
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const e_pin_type& pin_type,
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const e_side& io_side);
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size_t get_grid_num_classes(const t_grid_tile& cur_grid,
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const e_pin_type& pin_type);
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short get_rr_node_actual_track_id(const RRGraph& rr_graph,
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const RRNodeId& track_rr_node,
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const vtr::Point<size_t>& coord,
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const vtr::vector<RRNodeId, std::vector<size_t>>& tileable_rr_graph_node_track_ids);
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vtr::Point<size_t> get_track_rr_node_start_coordinator(const RRGraph& rr_graph,
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const RRNodeId& track_rr_node);
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vtr::Point<size_t> get_track_rr_node_end_coordinator(const RRGraph& rr_graph,
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const RRNodeId& track_rr_node);
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short get_track_rr_node_end_track_id(const RRGraph& rr_graph,
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const RRNodeId& track_rr_node,
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const vtr::vector<RRNodeId, std::vector<size_t>>& tileable_rr_graph_node_track_ids);
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short find_rr_graph_num_nodes(const RRGraph& rr_graph,
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const std::vector<t_rr_type>& node_types);
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short find_rr_graph_max_fan_in(const RRGraph& rr_graph,
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const std::vector<t_rr_type>& node_types);
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short find_rr_graph_min_fan_in(const RRGraph& rr_graph,
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const std::vector<t_rr_type>& node_types);
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short find_rr_graph_average_fan_in(const RRGraph& rr_graph,
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const std::vector<t_rr_type>& node_types);
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void print_rr_graph_mux_stats(const RRGraph& rr_graph);
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} /* end namespace openfpga */
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#endif
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