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[core] fixed a bug where net name is not shown correctly on wire LUTs

This commit is contained in:
tangxifan 2024-05-31 12:45:12 -07:00
parent d82f1efd8b
commit 48c0b4b219
1 changed files with 7 additions and 2 deletions
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9
openfpga/src/repack/build_physical_truth_table.cpp
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@ -138,8 +138,13 @@ static void build_physical_pb_lut_truth_tables(
size_t(lut_pb_id), output_pin->to_string().c_str());
VTR_LOGV(verbose, "Input nets:\n");
for (auto input_net : input_nets) {
VTR_LOGV(verbose, "\t%s\n",
atom_ctx.nlist.net_name(input_net).c_str());
if (AtomNetId::INVALID() == input_net) {
VTR_LOGV(verbose, "unconn ");
} else {
VTR_ASSERT(AtomNetId::INVALID() != input_net);
VTR_LOGV(verbose, "\t%s\n",
atom_ctx.nlist.net_name(input_net).c_str());
}
}
VTR_LOGV(verbose, "Output nets:\n");
VTR_LOGV(verbose, "\t%s\n",