diff --git a/CMakeLists.txt b/CMakeLists.txt index 2df2d423c..ca03e30c3 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -70,6 +70,7 @@ option(OPENFPGA_WITH_YOSYS_PLUGIN "Enable building Yosys plugin" ON) option(OPENFPGA_WITH_TEST "Enable testing build for codebase. Once enabled, make test can be run" ON) option(OPENFPGA_WITH_VERSION "Enable version always-up-to-date when building codebase. Disable only when you do not care an accurate version number" ON) option(OPENFPGA_WITH_SWIG "Enable SWIG interface when building codebase. Disable when you do not need high-level interfaces, such as Tcl/Python" ON) +option(OPENFPGA_ENABLE_STRICT_COMPILE "Specifies whether compiler warnings should be treated as errors (e.g. -Werror)" OFF) # Options pass on to VTR set(WITH_ABC ON CACHE BOOL "Enable building ABC in Verilog-to-Routing") @@ -83,6 +84,7 @@ set(WITH_YOSYS OFF CACHE BOOL "Enable building Yosys in Verilog-to-Routing") set(ODIN_YOSYS OFF CACHE BOOL "Enable building odin with yosys in Verilog-to-Routing") set(YOSYS_SV_UHDM_PLUGIN OFF CACHE BOOL "Enable building and installing Yosys SystemVerilog and UHDM plugins in Verilog-to-Routing") set(VTR_ENABLE_VERSION ${OPENFPGA_WITH_VERSION} CACHE BOOL "Enable version always-up-to-date when building codebase. Disable only when you do not care an accurate version number") +set(VTR_ENABLE_STRICT_COMPILE ${OPENFPGA_ENABLE_STRICT_COMPILE} CACHE BOOL "Specifies whether compiler warnings should be treated as errors (e.g. -Werror)") # TCL file/lib required to link with SWIG generated wrapper if (OPENFPGA_WITH_SWIG) diff --git a/openfpga/CMakeLists.txt b/openfpga/CMakeLists.txt index cbe4e2707..5ee3d079d 100644 --- a/openfpga/CMakeLists.txt +++ b/openfpga/CMakeLists.txt @@ -47,6 +47,24 @@ target_link_libraries(libopenfpga add_executable(openfpga ${EXEC_SOURCE}) target_link_libraries(openfpga libopenfpga) +if (OPENFPGA_ENABLE_STRICT_COMPILE) + message(STATUS "OpenFPGA: building with strict flags") + + set(OPENFPGA_STRICT_COMPILE_FLAGS_TO_CHECK + #GCC-like + "-Werror" + # due to the pointer hackery in timing_driven_route_structs and BinaryHeap.heap_ + "-Wno-error=free-nonheap-object" + ) + + foreach(flag ${OPENFPGA_STRICT_COMPILE_FLAGS_TO_CHECK}) + message(STATUS "\tAdding CXX flag: ${flag}") + target_compile_options(libopenfpga PRIVATE ${flag}) + target_compile_options(openfpga PRIVATE ${flag}) + target_link_libraries(openfpga ${flag}) + endforeach() +endif() + #Suppress IPO link warnings if IPO is enabled get_target_property(OPENFPGA_USES_IPO openfpga INTERPROCEDURAL_OPTIMIZATION) if (OPENFPGA_USES_IPO)