diff --git a/vpr/src/tileable_rr_graph/tileable_rr_graph_edge_builder.cpp b/vpr/src/tileable_rr_graph/tileable_rr_graph_edge_builder.cpp index 185e4923b..fd2d4db62 100644 --- a/vpr/src/tileable_rr_graph/tileable_rr_graph_edge_builder.cpp +++ b/vpr/src/tileable_rr_graph/tileable_rr_graph_edge_builder.cpp @@ -92,7 +92,8 @@ void build_rr_graph_edges(RRGraph& rr_graph, const DeviceGrid& grids, const vtr::Point& device_chan_width, const std::vector& segment_inf, - int** Fc_in, int** Fc_out, + const std::vector>& Fc_in, + const std::vector>& Fc_out, const e_switch_block_type& sb_type, const int& Fs, const e_switch_block_type& sb_subtype, const int& subFs, const bool& wire_opposite_side) { diff --git a/vpr/src/tileable_rr_graph/tileable_rr_graph_edge_builder.h b/vpr/src/tileable_rr_graph/tileable_rr_graph_edge_builder.h index 34c2ced24..4a643fcda 100644 --- a/vpr/src/tileable_rr_graph/tileable_rr_graph_edge_builder.h +++ b/vpr/src/tileable_rr_graph/tileable_rr_graph_edge_builder.h @@ -7,6 +7,7 @@ #include /* Headers from vtrutil library */ +#include "vtr_ndmatrix.h" #include "vtr_geometry.h" #include "physical_types.h" @@ -26,7 +27,8 @@ void build_rr_graph_edges(RRGraph& rr_graph, const DeviceGrid& grids, const vtr::Point& device_chan_width, const std::vector& segment_inf, - int** Fc_in, int** Fc_out, + const std::vector>& Fc_in, + const std::vector>& Fc_out, const e_switch_block_type& sb_type, const int& Fs, const e_switch_block_type& sb_subtype, const int& subFs, const bool& wire_opposite_side); diff --git a/vpr/src/tileable_rr_graph/tileable_rr_graph_gsb.cpp b/vpr/src/tileable_rr_graph/tileable_rr_graph_gsb.cpp index e2bf6e4ce..cca9e001c 100755 --- a/vpr/src/tileable_rr_graph/tileable_rr_graph_gsb.cpp +++ b/vpr/src/tileable_rr_graph/tileable_rr_graph_gsb.cpp @@ -966,7 +966,7 @@ void build_gsb_one_ipin_track2pin_map(const RRGraph& rr_graph, const RRGSB& rr_gsb, const enum e_side& ipin_side, const size_t& ipin_node_id, - const size_t& Fc, + const std::vector& Fc, const size_t& offset, const std::vector& segment_inf, t_track2pin_map& track2ipin_map) { @@ -995,7 +995,7 @@ void build_gsb_one_ipin_track2pin_map(const RRGraph& rr_graph, VTR_ASSERT(0 == actual_track_list.size() % 2); /* Scale Fc */ - int actual_Fc = std::ceil((float)Fc * (float)actual_track_list.size() / (float)chan_width); + int actual_Fc = std::ceil((float)Fc[iseg] * (float)actual_track_list.size() / (float)chan_width); /* Minimum Fc should be 2 : ensure we will connect to a pair of routing tracks */ actual_Fc = std::max(1, actual_Fc); /* Compute the step between two connection from this IPIN to tracks: @@ -1060,7 +1060,7 @@ void build_gsb_one_opin_pin2track_map(const RRGraph& rr_graph, const RRGSB& rr_gsb, const enum e_side& opin_side, const size_t& opin_node_id, - const size_t& Fc, + const std::vector& Fc, const size_t& offset, const std::vector& segment_inf, t_pin2track_map& opin2track_map) { @@ -1094,7 +1094,7 @@ void build_gsb_one_opin_pin2track_map(const RRGraph& rr_graph, } /* Scale Fc */ - int actual_Fc = std::ceil((float)Fc * (float)actual_track_list.size() / (float)chan_width); + int actual_Fc = std::ceil((float)Fc[iseg] * (float)actual_track_list.size() / (float)chan_width); /* Minimum Fc should be 1 : ensure we will drive 1 routing track */ actual_Fc = std::max(1, actual_Fc); /* Compute the step between two connection from this IPIN to tracks: @@ -1144,8 +1144,6 @@ void build_gsb_one_opin_pin2track_map(const RRGraph& rr_graph, } */ } - - return; } @@ -1163,7 +1161,7 @@ t_track2pin_map build_gsb_track_to_ipin_map(const RRGraph& rr_graph, const RRGSB& rr_gsb, const DeviceGrid& grids, const std::vector& segment_inf, - int** Fc_in) { + const std::vector>& Fc_in) { t_track2pin_map track2ipin_map; /* Resize the matrix */ track2ipin_map.resize(rr_gsb.get_num_sides()); @@ -1202,16 +1200,29 @@ t_track2pin_map build_gsb_track_to_ipin_map(const RRGraph& rr_graph, if (true == is_empty_type(grids[rr_graph.node_xlow(ipin_node)][rr_graph.node_ylow(ipin_node)].type)) { continue; } + int grid_type_index = grids[rr_graph.node_xlow(ipin_node)][rr_graph.node_ylow(ipin_node)].type->index; /* Get Fc of the ipin */ - int ipin_Fc = Fc_in[grid_type_index][rr_graph.node_pin_num(ipin_node)]; - /* skip Fc = 0 */ - if ( (-1 == ipin_Fc) - || (0 == ipin_Fc) ) { + /* skip Fc = 0 or unintialized, those pins are in the */ + bool skip_conn2track = true; + std::vector ipin_Fc_out; + for (size_t iseg = 0; iseg < segment_inf.size(); ++iseg) { + int ipin_Fc = Fc_in[grid_type_index][rr_graph.node_pin_num(ipin_node)][iseg]; + ipin_Fc_out.push_back(ipin_Fc); + if (0 != ipin_Fc) { + skip_conn2track = false; + break; + } + } + + if (true == skip_conn2track) { continue; } + + VTR_ASSERT(ipin_Fc_out.size() == segment_inf.size()); + /* Build track2ipin_map for this IPIN */ - build_gsb_one_ipin_track2pin_map(rr_graph, rr_gsb, ipin_side, inode, ipin_Fc, + build_gsb_one_ipin_track2pin_map(rr_graph, rr_gsb, ipin_side, inode, ipin_Fc_out, /* Give an offset for the first track that this ipin will connect to */ offset[chan_side_manager.to_size_t()], segment_inf, track2ipin_map); @@ -1240,7 +1251,7 @@ t_pin2track_map build_gsb_opin_to_track_map(const RRGraph& rr_graph, const RRGSB& rr_gsb, const DeviceGrid& grids, const std::vector& segment_inf, - int** Fc_out) { + const std::vector>& Fc_out) { t_pin2track_map opin2track_map; /* Resize the matrix */ opin2track_map.resize(rr_gsb.get_num_sides()); @@ -1269,15 +1280,27 @@ t_pin2track_map build_gsb_opin_to_track_map(const RRGraph& rr_graph, continue; } int grid_type_index = grids[rr_graph.node_xlow(opin_node)][rr_graph.node_ylow(opin_node)].type->index; + /* Get Fc of the ipin */ - int opin_Fc = Fc_out[grid_type_index][rr_graph.node_pin_num(opin_node)]; /* skip Fc = 0 or unintialized, those pins are in the */ - if ( (-1 == opin_Fc) - || (0 == opin_Fc) ) { + bool skip_conn2track = true; + std::vector opin_Fc_out; + for (size_t iseg = 0; iseg < segment_inf.size(); ++iseg) { + int opin_Fc = Fc_out[grid_type_index][rr_graph.node_pin_num(opin_node)][iseg]; + opin_Fc_out.push_back(opin_Fc); + if (0 != opin_Fc) { + skip_conn2track = false; + break; + } + } + + if (true == skip_conn2track) { continue; } + VTR_ASSERT(opin_Fc_out.size() == segment_inf.size()); + /* Build track2ipin_map for this IPIN */ - build_gsb_one_opin_pin2track_map(rr_graph, rr_gsb, opin_side, inode, opin_Fc, + build_gsb_one_opin_pin2track_map(rr_graph, rr_gsb, opin_side, inode, opin_Fc_out, /* Give an offset for the first track that this ipin will connect to */ offset[side_manager.to_size_t()], segment_inf, opin2track_map); diff --git a/vpr/src/tileable_rr_graph/tileable_rr_graph_gsb.h b/vpr/src/tileable_rr_graph/tileable_rr_graph_gsb.h index 7c7568fb9..adf6118fb 100755 --- a/vpr/src/tileable_rr_graph/tileable_rr_graph_gsb.h +++ b/vpr/src/tileable_rr_graph/tileable_rr_graph_gsb.h @@ -59,13 +59,13 @@ t_track2pin_map build_gsb_track_to_ipin_map(const RRGraph& rr_graph, const RRGSB& rr_gsb, const DeviceGrid& grids, const std::vector& segment_inf, - int** Fc_in); + const std::vector>& Fc_in); t_pin2track_map build_gsb_opin_to_track_map(const RRGraph& rr_graph, const RRGSB& rr_gsb, const DeviceGrid& grids, const std::vector& segment_inf, - int** Fc_out); + const std::vector>& Fc_out); void build_direct_connections_for_one_gsb(RRGraph& rr_graph, const DeviceGrid& grids,