riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Update to include new figures

This commit is contained in:
bbleaptrot 2021-04-13 16:04:20 -06:00 committed by GitHub
parent eff784e77b
commit 423d814730
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 11 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
docs/source/tutorials/arch_modeling/spypads_tutorial.rst
View File

@ -213,10 +213,10 @@ Using :ref:`fig_gpout_ports` as a guide, we can relate our task like :numref:`fi
.. _fig_gpout_example:
.. figure:: ./figures/gpout_ports_example.png
.. figure:: ./figures/lut6_Example_Spypad.svg
:scale: 100%
Diagram for ``lut6_out``
Diagram for ``frac_lut6_spypad``
We can view testbench waveforms with GTKWave by running the following command from the root directory:
@ -302,6 +302,15 @@ The ``fpga_top.v`` should have the following in its module definition:
input [0:0] clk;
//----- GPOUT PORTS -----
output [0:19] gfpga_pad_ADDF_sumout;
The architecture will now look like :numref:`fig_addf_example`
.. _fig_addf_example:
.. figure:: ./figures/ADDF_Example_Spypad.svg
:scale: 100%
Diagram for ``ADDF``
We can view the waveform by running GTKWave: