From 3e3a65223cbd7429303c8b043f538fcbf8bb8837 Mon Sep 17 00:00:00 2001 From: tangxifan Date: Sun, 20 Mar 2022 11:04:07 +0800 Subject: [PATCH] [Test] Deploy new test case to basic regression tests --- openfpga_flow/regression_test_scripts/basic_reg_test.sh | 1 + 1 file changed, 1 insertion(+) diff --git a/openfpga_flow/regression_test_scripts/basic_reg_test.sh b/openfpga_flow/regression_test_scripts/basic_reg_test.sh index 2fa69fb87..b3a6a7193 100755 --- a/openfpga_flow/regression_test_scripts/basic_reg_test.sh +++ b/openfpga_flow/regression_test_scripts/basic_reg_test.sh @@ -139,6 +139,7 @@ echo -e "Testing global port definition from tiles"; run-task basic_tests/global_tile_ports/global_tile_clock --debug --show_thread_logs run-task basic_tests/global_tile_ports/global_tile_reset --debug --show_thread_logs run-task basic_tests/global_tile_ports/global_tile_4clock --debug --show_thread_logs +run-task basic_tests/global_tile_ports/global_tile_4clock_pin --debug --show_thread_logs echo -e "Testing configuration chain of a K4N4 FPGA using .blif generated by yosys+verific"; run-task basic_tests/verific_test --debug --show_thread_logs