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modify format

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Victor 2024-09-11 18:31:05 +08:00
parent 388a8615ee
commit 3d57280afa
1 changed files with 26 additions and 26 deletions
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52
docs/source/manual/file_formats/reference_file.rst
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@ -20,56 +20,56 @@ Date: Mon Sep 9 16:41:53 2024
references:
+ module: grid_io_top
count: 1
instances:
* count: 1
* instances:
- grid_io_top_1__2_
+ module: grid_io_right
count: 1
instances:
* count: 1
* instances:
- grid_io_right_2__1_
+ module: grid_io_bottom
count: 1
instances:
* count: 1
* instances:
- grid_io_bottom_1__0_
+ module: grid_io_left
count: 1
instances:
* count: 1
* instances:
- grid_io_left_0__1_
+ module: grid_clb
count: 1
instances:
* count: 1
* instances:
- grid_clb_1__1_
+ module: sb_0__0_
count: 1
instances:
* count: 1
* instances:
- sb_0__0_
+ module: sb_0__1_
count: 1
instances:
* count: 1
* instances:
- sb_0__1_
+ module: sb_1__0_
count: 1
instances:
* count: 1
* instances:
- sb_1__0_
+ module: sb_1__1_
count: 1
instances:
* count: 1
* instances:
- sb_1__1_
+ module: cbx_1__0_
count: 1
instances:
* count: 1
* instances:
- cbx_1__0_
+ module: cbx_1__1_
count: 1
instances:
* count: 1
* instances:
- cbx_1__1_
+ module: cby_0__1_
count: 1
instances:
* count: 1
* instances:
- cby_0__1_
+ module: cby_1__1_
count: 1
instances:
* count: 1
* instances:
- cby_1__1_
In this example, the parent module is ``fpga_top``.