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[core] code format

This commit is contained in:
tangxifan 2023-10-20 22:02:56 -07:00
parent 66c3226fad
commit 3d4f1505b6
2 changed files with 27 additions and 24 deletions
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4
openfpga/src/fabric/build_memory_modules.cpp
View File

@ -1514,8 +1514,8 @@ int add_physical_memory_module(ModuleManager& module_manager,
if (!suggested_module_name_prefix.empty()) {
module_name_prefix = suggested_module_name_prefix;
}
std::string phy_mem_module_name =
generate_physical_memory_module_name(module_name_prefix, module_num_config_bits);
std::string phy_mem_module_name = generate_physical_memory_module_name(
module_name_prefix, module_num_config_bits);
VTR_LOGV(verbose, "Adding memory group module '%s' as a child to '%s'...\n",
phy_mem_module_name.c_str(),
module_manager.module_name(curr_module).c_str());

47
openfpga/src/fabric/build_routing_modules.cpp
View File

@ -384,8 +384,8 @@ static void build_switch_block_module(
const VprDeviceAnnotation& device_annotation, const DeviceGrid& grids,
const RRGraphView& rr_graph, const CircuitLibrary& circuit_lib,
const e_config_protocol_type& sram_orgz_type,
const CircuitModelId& sram_model, const DeviceRRGSB& device_rr_gsb, const RRGSB& rr_gsb,
const bool& group_config_block, const bool& verbose) {
const CircuitModelId& sram_model, const DeviceRRGSB& device_rr_gsb,
const RRGSB& rr_gsb, const bool& group_config_block, const bool& verbose) {
/* Create a Module of Switch Block and add to module manager */
vtr::Point<size_t> gsb_coordinate(rr_gsb.get_sb_x(), rr_gsb.get_sb_y());
ModuleId sb_module = module_manager.add_module(
@ -494,11 +494,12 @@ static void build_switch_block_module(
/* Build a physical memory block */
if (group_config_block) {
std::string mem_module_name_prefix =
generate_switch_block_module_name_using_index(device_rr_gsb.get_sb_unique_module_index(gsb_coordinate));
add_physical_memory_module(module_manager, decoder_lib, sb_module, mem_module_name_prefix,
circuit_lib, sram_orgz_type, sram_model,
verbose);
std::string mem_module_name_prefix =
generate_switch_block_module_name_using_index(
device_rr_gsb.get_sb_unique_module_index(gsb_coordinate));
add_physical_memory_module(module_manager, decoder_lib, sb_module,
mem_module_name_prefix, circuit_lib,
sram_orgz_type, sram_model, verbose);
}
/* Add global ports to the pb_module:
@ -893,8 +894,8 @@ static void build_connection_block_module(
const VprDeviceAnnotation& device_annotation, const DeviceGrid& grids,
const RRGraphView& rr_graph, const CircuitLibrary& circuit_lib,
const e_config_protocol_type& sram_orgz_type,
const CircuitModelId& sram_model, const DeviceRRGSB& device_rr_gsb, const RRGSB& rr_gsb,
const t_rr_type& cb_type, const bool& group_config_block,
const CircuitModelId& sram_model, const DeviceRRGSB& device_rr_gsb,
const RRGSB& rr_gsb, const t_rr_type& cb_type, const bool& group_config_block,
const bool& verbose) {
/* Create the netlist */
vtr::Point<size_t> gsb_coordinate(rr_gsb.get_cb_x(cb_type),
@ -1024,11 +1025,13 @@ static void build_connection_block_module(
/* Build a physical memory block */
if (group_config_block) {
std::string mem_module_name_prefix =
generate_connection_block_module_name_using_index(cb_type, device_rr_gsb.get_cb_unique_module_index(cb_type, gsb_coordinate));
add_physical_memory_module(module_manager, decoder_lib, cb_module, mem_module_name_prefix,
circuit_lib, sram_orgz_type, sram_model,
verbose);
std::string mem_module_name_prefix =
generate_connection_block_module_name_using_index(
cb_type,
device_rr_gsb.get_cb_unique_module_index(cb_type, gsb_coordinate));
add_physical_memory_module(module_manager, decoder_lib, cb_module,
mem_module_name_prefix, circuit_lib,
sram_orgz_type, sram_model, verbose);
}
/* Add global ports to the pb_module:
@ -1109,8 +1112,8 @@ static void build_flatten_connection_block_modules(
}
build_connection_block_module(
module_manager, decoder_lib, device_annotation, device_ctx.grid,
device_ctx.rr_graph, circuit_lib, sram_orgz_type, sram_model, device_rr_gsb, rr_gsb,
cb_type, group_config_block, verbose);
device_ctx.rr_graph, circuit_lib, sram_orgz_type, sram_model,
device_rr_gsb, rr_gsb, cb_type, group_config_block, verbose);
}
}
}
@ -1142,10 +1145,10 @@ void build_flatten_routing_modules(
if (false == rr_gsb.is_sb_exist(device_ctx.rr_graph)) {
continue;
}
build_switch_block_module(module_manager, decoder_lib, device_annotation,
device_ctx.grid, device_ctx.rr_graph,
circuit_lib, sram_orgz_type, sram_model, device_rr_gsb, rr_gsb,
group_config_block, verbose);
build_switch_block_module(
module_manager, decoder_lib, device_annotation, device_ctx.grid,
device_ctx.rr_graph, circuit_lib, sram_orgz_type, sram_model,
device_rr_gsb, rr_gsb, group_config_block, verbose);
}
}
@ -1185,8 +1188,8 @@ void build_unique_routing_modules(
const RRGSB& unique_mirror = device_rr_gsb.get_sb_unique_module(isb);
build_switch_block_module(module_manager, decoder_lib, device_annotation,
device_ctx.grid, device_ctx.rr_graph, circuit_lib,
sram_orgz_type, sram_model, device_rr_gsb, unique_mirror,
group_config_block, verbose);
sram_orgz_type, sram_model, device_rr_gsb,
unique_mirror, group_config_block, verbose);
}
/* Build unique X-direction connection block modules */