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[Test] Now use dedicated simulation settings for the 4-clock architecture

This commit is contained in:
tangxifan 2021-01-14 15:40:16 -07:00
parent 852f5bb72e
commit 3b5394b45f
1 changed files with 1 additions and 1 deletions
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2
openfpga_flow/tasks/basic_tests/global_tile_ports/global_tile_4clock/config/task.conf
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@ -24,7 +24,7 @@ fpga_flow=vpr_blif
[OpenFPGA_SHELL]
openfpga_shell_template=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_shell_scripts/global_tile_clock_example_script.openfpga
openfpga_arch_file=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_arch/k4_N4_40nm_GlobalTile4Clk_cc_openfpga.xml
openfpga_sim_setting_file=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_simulation_settings/auto_sim_openfpga.xml
openfpga_sim_setting_file=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_simulation_settings/fixed_4clock_sim_openfpga.xml
[ARCHITECTURES]
arch0=${PATH:OPENFPGA_PATH}/openfpga_flow/vpr_arch/k4_N4_tileable_GlobalTile4Clk_40nm.xml