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[Tool] Bug fix to enable nature fracturable LUT design

This commit is contained in:
tangxifan 2020-11-25 23:01:18 -07:00
parent a60bd4d14a
commit 3a708cff21
1 changed files with 4 additions and 2 deletions
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6
openfpga/src/fabric/build_lut_modules.cpp
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@ -73,7 +73,8 @@ void build_lut_module(ModuleManager& module_manager,
VTR_ASSERT (1 == lut_input_ports.size());
VTR_ASSERT (1 <= lut_output_ports.size());
VTR_ASSERT (1 == lut_regular_sram_ports.size());
VTR_ASSERT (1 == lut_mode_select_sram_ports.size());
VTR_ASSERT ( (0 == lut_mode_select_sram_ports.size())
|| (1 == lut_mode_select_sram_ports.size()));
}
/***********************************************
@ -268,7 +269,8 @@ void build_lut_module(ModuleManager& module_manager,
}
/* Sanitity check */
if ( true == circuit_lib.is_lut_fracturable(lut_model) ) {
if ( (true == circuit_lib.is_lut_fracturable(lut_model))
&& (false == lut_mode_select_sram_ports.empty()) ) {
if (mode_select_port_lsb != circuit_lib.port_size(lut_mode_select_sram_ports[0])) {
VTR_LOGF_ERROR(__FILE__, __LINE__,
"Circuit model '%s' has a unmatched tri-state map '%s' implied by mode_port size='%d'!\n",