diff --git a/openfpga_flow/scripts/run_fpga_flow.py b/openfpga_flow/scripts/run_fpga_flow.py
index ca7788653..26116f0ec 100644
--- a/openfpga_flow/scripts/run_fpga_flow.py
+++ b/openfpga_flow/scripts/run_fpga_flow.py
@@ -261,6 +261,8 @@ def main():
             run_ace2()
             run_pro_blif_3arg()
             run_rewrite_verilog()
+        else: 
+            shutil.copy(args.top_module+'_yosys_out.blif', args.top_module+".blif")
     if (args.fpga_flow == "vpr_blif"):
         collect_files_for_vpr()
     logger.info("Runing OpenFPGA Shell Engine ")