From 3a3877fd088a86f85054a0a4a3d8837fafb5c536 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Mon, 3 Oct 2022 21:18:08 -0700
Subject: [PATCH] [engine] update vtr: fix a bug where placer does not call
 tileable rr_graph generator

---
 vtr-verilog-to-routing | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/vtr-verilog-to-routing b/vtr-verilog-to-routing
index 942d1bbff..5226096ee 160000
--- a/vtr-verilog-to-routing
+++ b/vtr-verilog-to-routing
@@ -1 +1 @@
-Subproject commit 942d1bbfff837d9c5409f6f0932dec574fb7e7c2
+Subproject commit 5226096ee94b2b589078926a203fe71996343992