Merge branch 'master' of https://github.com/LNIS-Projects/OpenFPGA into pin_constraint_polarity
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commit
3906497ef5
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@ -271,6 +271,9 @@ def generate_each_task_actions(taskname):
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fallback=ys_rewrite_for_task_common)
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CurrBenchPara["chan_width"] = SynthSection.get(bech_name+"_chan_width",
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fallback=chan_width_common)
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for eachKey, eachValue in SynthSection.items():
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eachKey = eachKey.replace(bech_name+"_","").upper()
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CurrBenchPara[eachKey] = eachValue
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if GeneralSection.get("fpga_flow") == "vpr_blif":
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# Check if activity file exist
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