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[test] avoid no-fanin errors for hetero arch

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tangxifan 2024-05-06 15:32:27 -07:00
parent 00959ab7e0
commit 3615bdceeb
1 changed files with 1 additions and 1 deletions
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openfpga_flow/vpr_arch/k4_frac_N4_tileable_adder_chain_mem1K_L124X_L12Y_ChanWidth0p8_40nm.xml
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@ -136,7 +136,7 @@
<output name="d_out" num_pins="8"/> <output name="d_out" num_pins="8"/>
<clock name="clk" num_pins="1"/> <clock name="clk" num_pins="1"/>
<fc in_type="frac" in_val="0.25" out_type="frac" out_val="0.20"/> <fc in_type="frac" in_val="0.25" out_type="frac" out_val="0.20"/>
<pinlocations pattern="spread"/> <pinlocations pattern="perimeter"/>
</sub_tile> </sub_tile>
</tile> </tile>
</tiles> </tiles>