diff --git a/openfpga_flow/openfpga_arch/k4_frac_N4_fracff_40nm_registerable_io_cc_openfpga.xml b/openfpga_flow/openfpga_arch/k4_frac_N4_fracff_40nm_registerable_io_cc_openfpga.xml
index 8a05bacc2..c2f043af5 100644
--- a/openfpga_flow/openfpga_arch/k4_frac_N4_fracff_40nm_registerable_io_cc_openfpga.xml
+++ b/openfpga_flow/openfpga_arch/k4_frac_N4_fracff_40nm_registerable_io_cc_openfpga.xml
@@ -202,9 +202,11 @@
   <tile_annotations>
     <global_port name="op_clk" tile_port="clb.clk" is_clock="true" default_val="0">
       <tile name="clb" port="clk"/>
+      <tile name="io" port="clk"/>
     </global_port>
     <global_port name="op_reset" is_reset="true" default_val="0">
       <tile name="clb" port="reset"/>
+      <tile name="io" port="reset"/>
     </global_port>
   </tile_annotations>
   <pb_type_annotations>