From 3285af4107768b46103eabf7b9c8f164d10449d1 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Wed, 28 Sep 2022 11:39:37 -0700
Subject: [PATCH] [engine] syntax

---
 .../src/annotation/annotate_clustering.cpp     | 18 +++++++++++-------
 openfpga/src/annotation/annotate_clustering.h  |  6 +++---
 openfpga/src/base/openfpga_link_arch.cpp       |  9 ++++++---
 3 files changed, 20 insertions(+), 13 deletions(-)

diff --git a/openfpga/src/annotation/annotate_clustering.cpp b/openfpga/src/annotation/annotate_clustering.cpp
index c806a03d3..92717a2a3 100644
--- a/openfpga/src/annotation/annotate_clustering.cpp
+++ b/openfpga/src/annotation/annotate_clustering.cpp
@@ -7,6 +7,8 @@
 #include "vtr_log.h"
 #include "vtr_geometry.h"
 
+#include "command_exit_codes.h"
+
 #include "annotate_clustering.h"
 
 /* begin namespace openfpga */
@@ -15,12 +17,12 @@ namespace openfpga {
 /* @brief Record the net remapping and local routing trace changes in annotation 
  * This is to ensure that the clustering annotation data structure is always up-to-date
  */
-void annotate_post_routing_cluster_sync_results(const DeviceContext& device_ctx, 
-                                                const ClusteringContext& cluster_ctx, 
-                                                VprClusteringAnnotation& cluster_annotation) {
+bool annotate_post_routing_cluster_sync_results(const DeviceContext& device_ctx, 
+                                                const ClusteringContext& clustering_ctx, 
+                                                VprClusteringAnnotation& clustering_annotation) {
   VTR_LOG("Building annotation for post-routing and clustering synchornization results...");
 
-  for (const ClusterBlockId& cluster_blk_id : cluster_ctx.clb_nlist.blocks()) {
+  for (const ClusterBlockId& cluster_blk_id : clustering_ctx.clb_nlist.blocks()) {
     /* Skip invalid ids */
     if (!cluster_blk_id) {
       continue;
@@ -29,16 +31,18 @@ void annotate_post_routing_cluster_sync_results(const DeviceContext& device_ctx,
     for (int ipin = 0; ipin < logical_block->pb_type->num_pins; ++ipin) {
       ClusterNetId pre_routing_net_id = clustering_ctx.clb_nlist.block_net(cluster_blk_id, ipin);
       ClusterNetId post_routing_net_id = ClusterNetId::INVALID();
-      auto search_result = clustering_ctx.post_routing_clb_pin_nets[cluster_blk_id].find(ipin);
-      if (search_result != clustering_ctx.post_routing_clb_pin_nets[cluster_blk_id].end()) {
+      auto search_result = clustering_ctx.post_routing_clb_pin_nets.at(cluster_blk_id).find(ipin);
+      if (search_result != clustering_ctx.post_routing_clb_pin_nets.at(cluster_blk_id).end()) {
         post_routing_net_id = search_result->second;
       }
       if (post_routing_net_id) {
-        vpr_clustering_annotation.rename_net(cluster_blk_id, ipin, post_routing_net_id);
+        clustering_annotation.rename_net(cluster_blk_id, ipin, post_routing_net_id);
       }
     }
   } 
   VTR_LOG("Done\n");
+
+  return CMD_EXEC_SUCCESS;
 }
 
 } /* end namespace openfpga */
diff --git a/openfpga/src/annotation/annotate_clustering.h b/openfpga/src/annotation/annotate_clustering.h
index f9229ce4e..3deb3ba91 100644
--- a/openfpga/src/annotation/annotate_clustering.h
+++ b/openfpga/src/annotation/annotate_clustering.h
@@ -14,9 +14,9 @@
 /* begin namespace openfpga */
 namespace openfpga {
 
-void annotate_post_routing_cluster_sync_results(const DeviceContext& device_ctx, 
-                                                const ClusteringContext& cluster_ctx, 
-                                                VprClusteringAnnotation& cluster_annotation);
+bool annotate_post_routing_cluster_sync_results(const DeviceContext& device_ctx, 
+                                                const ClusteringContext& clustering_ctx, 
+                                                VprClusteringAnnotation& clustering_annotation);
 
 } /* end namespace openfpga */
 
diff --git a/openfpga/src/base/openfpga_link_arch.cpp b/openfpga/src/base/openfpga_link_arch.cpp
index b45ed1533..eed364057 100644
--- a/openfpga/src/base/openfpga_link_arch.cpp
+++ b/openfpga/src/base/openfpga_link_arch.cpp
@@ -157,9 +157,12 @@ int link_arch(OpenfpgaContext& openfpga_ctx,
                                                                 cmd_context.option_enable(cmd, opt_verbose));
 
   /* Annotate clustering results */
-  annotate_post_routing_cluster_sync_results(g_vpr_ctx.device(),
-                                             g_vpr_ctx.clustering(),
-                                             openfpga_ctx.mutable_vpr_clustering_annotation());
+  if (CMD_EXEC_FATAL_ERROR == annotate_post_routing_cluster_sync_results(g_vpr_ctx.device(),
+                                                                         g_vpr_ctx.clustering(),
+                                                                         openfpga_ctx.mutable_vpr_clustering_annotation())) {
+
+    return CMD_EXEC_FATAL_ERROR;
+  }
 
   /* Annotate placement results */
   annotate_mapped_blocks(g_vpr_ctx.device(),