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[test] fixed a few bugs

This commit is contained in:
tangxifan 2023-05-27 12:47:57 -07:00
parent 27b8007d1b
commit 31b16ba9d7
1 changed files with 4 additions and 2 deletions
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6
openfpga_flow/tasks/basic_tests/mock_wrapper/mock_wrapper_pcf/config/task.conf
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@ -33,8 +33,10 @@ bench0=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/micro_benchmark/and2_latch
[SYNTHESIS_PARAM]
bench_read_verilog_options_common = -nolatches
bench1_top = and2_latch_2clock
bench1_openfpga_pin_constraints=--design_constraints ${PATH:TASK_DIR}/config/and2_latch_pin_constraints.xml
bench0_top = and2_latch_2clock
bench0_openfpga_pin_constraints=--design_constraints ${PATH:TASK_DIR}/config/and2_latch_pin_constraints.xml
bench0_openfpga_mock_wrapper_pcf=-pcf ${PATH:TASK_DIR}/config/and2_latch_pin_constraints.xml
bench0_openfpga_mock_wrapper_bgf=
[SCRIPT_PARAM_MIN_ROUTE_CHAN_WIDTH]
end_flow_with_test=