[script] update cmakelist to sync up latest compilation options in VTR

CMakeLists.txt

@@ -80,10 +80,9 @@ set(ODIN_WARN OFF CACHE BOOL "Enable building odin with extra warning flags in V
 set(ODIN_COVERAGE OFF CACHE BOOL "Enable building odin with coverage flags in Verilog-to-Routing")
 set(ODIN_TIDY OFF CACHE BOOL "Enable building odin with clang tidy in Verilog-to-Routing")
 set(ODIN_SANITIZE OFF CACHE BOOL "Enable building odin with sanitize flags in Verilog-to-Routing")
-set(WITH_YOSYS OFF CACHE BOOL "Enable building Yosys in Verilog-to-Routing")
-set(ODIN_YOSYS OFF CACHE BOOL "Enable building odin with yosys in Verilog-to-Routing")
 set(YOSYS_SV_UHDM_PLUGIN OFF CACHE BOOL "Enable building and installing Yosys SystemVerilog and UHDM plugins in Verilog-to-Routing")
 set(VTR_ENABLE_VERSION ${OPENFPGA_WITH_VERSION} CACHE BOOL "Enable version always-up-to-date when building codebase. Disable only when you do not care an accurate version number")
+set(WITH_PARMYS OFF CACHE BOOL "Enable Yosys as elaborator and parmys-plugin as partial mapper")
 # TODO: OpenFPGA and VPR has different requirements on no-warning build, e.g., on OS and compiler versions
 #set(VTR_ENABLE_STRICT_COMPILE ${OPENFPGA_ENABLE_STRICT_COMPILE} CACHE BOOL "Specifies whether compiler warnings should be treated as errors (e.g. -Werror)")
 

Makefile

@@ -58,7 +58,7 @@ help:
 checkout: 
 # Update all the submodules
 	git submodule init
-	git submodule update --init --recursive
+	git submodule update --init --depth 1
 
 prebuild:
 # Run cmake to generate Makefile under the build directory, before compilation