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[Engine] Rework the function that counts the number of configurable children for fabric key writer and bitstream generator

This commit is contained in:
tangxifan 2021-09-24 15:15:32 -07:00
parent 74ffc8578f
commit 2de4a460a8
6 changed files with 26 additions and 17 deletions
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2
openfpga/src/base/openfpga_build_fabric.cpp
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@ -132,7 +132,7 @@ int build_fabric(OpenfpgaContext& openfpga_ctx,
VTR_ASSERT(false == fkey_fname.empty());
curr_status = write_fabric_key_to_xml_file(openfpga_ctx.module_graph(),
fkey_fname,
openfpga_ctx.arch().config_protocol.type(),
openfpga_ctx.arch().config_protocol,
cmd_context.option_enable(cmd, opt_verbose));
/* If there is any error, final status cannot be overwritten by a success flag */
if (CMD_EXEC_SUCCESS != curr_status) {

4
openfpga/src/fabric/fabric_key_writer.cpp
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@ -31,7 +31,7 @@ namespace openfpga {
***************************************************************************************/
int write_fabric_key_to_xml_file(const ModuleManager& module_manager,
const std::string& fname,
const e_config_protocol_type& config_protocol_type,
const ConfigProtocol& config_protocol,
const bool& verbose) {
std::string timer_message = std::string("Write fabric key to XML file '") + fname + std::string("'");
@ -71,7 +71,7 @@ int write_fabric_key_to_xml_file(const ModuleManager& module_manager,
/* Each configuration protocol has some child which should not be in the list. They are typically decoders */
size_t curr_region_num_config_child = module_manager.region_configurable_children(top_module, config_region).size();
size_t num_child_to_skip = estimate_num_configurable_children_to_skip_by_config_protocol(config_protocol_type, curr_region_num_config_child);
size_t num_child_to_skip = estimate_num_configurable_children_to_skip_by_config_protocol(config_protocol, curr_region_num_config_child);
curr_region_num_config_child -= num_child_to_skip;
fabric_key.reserve_region_keys(fabric_region, curr_region_num_config_child);

7
openfpga/src/fabric/fabric_key_writer.h
View File

@ -4,8 +4,9 @@
/********************************************************************
* Include header files that are required by function declaration
*******************************************************************/
#include "vpr_context.h"
#include "openfpga_context.h"
#include <string.h>
#include "module_manager.h"
#include "config_protocol.h"
/********************************************************************
* Function declaration
@ -16,7 +17,7 @@ namespace openfpga {
int write_fabric_key_to_xml_file(const ModuleManager& module_manager,
const std::string& fname,
const e_config_protocol_type& config_protocol_type,
const ConfigProtocol& config_protocol,
const bool& verbose);
} /* end namespace openfpga */

12
openfpga/src/fpga_bitstream/build_device_bitstream.cpp
View File

@ -64,7 +64,7 @@ static
size_t rec_estimate_device_bitstream_num_bits(const ModuleManager& module_manager,
const ModuleId& top_module,
const ModuleId& parent_module,
const e_config_protocol_type& config_protocol_type) {
const ConfigProtocol& config_protocol) {
size_t num_bits = 0;
/* If a child module has no configurable children, this is a leaf node
@ -85,13 +85,13 @@ size_t rec_estimate_device_bitstream_num_bits(const ModuleManager& module_manage
if (parent_module == top_module) {
for (const ConfigRegionId& config_region : module_manager.regions(parent_module)) {
size_t curr_region_num_config_child = module_manager.region_configurable_children(parent_module, config_region).size();
size_t num_child_to_skip = estimate_num_configurable_children_to_skip_by_config_protocol(config_protocol_type, curr_region_num_config_child);
size_t num_child_to_skip = estimate_num_configurable_children_to_skip_by_config_protocol(config_protocol, curr_region_num_config_child);
curr_region_num_config_child -= num_child_to_skip;
/* Visit all the children in a recursively way */
for (size_t ichild = 0; ichild < curr_region_num_config_child; ++ichild) {
ModuleId child_module = module_manager.region_configurable_children(parent_module, config_region)[ichild];
num_bits += rec_estimate_device_bitstream_num_bits(module_manager, top_module, child_module, config_protocol_type);
num_bits += rec_estimate_device_bitstream_num_bits(module_manager, top_module, child_module, config_protocol);
}
}
} else {
@ -102,14 +102,14 @@ size_t rec_estimate_device_bitstream_num_bits(const ModuleManager& module_manage
/* Frame-based configuration protocol will have 1 decoder
* if there are more than 1 configurable children
*/
if ( (CONFIG_MEM_FRAME_BASED == config_protocol_type)
if ( (CONFIG_MEM_FRAME_BASED == config_protocol.type())
&& (2 <= num_configurable_children)) {
num_configurable_children--;
}
for (size_t ichild = 0; ichild < num_configurable_children; ++ichild) {
ModuleId child_module = module_manager.configurable_children(parent_module)[ichild];
num_bits += rec_estimate_device_bitstream_num_bits(module_manager, top_module, child_module, config_protocol_type);
num_bits += rec_estimate_device_bitstream_num_bits(module_manager, top_module, child_module, config_protocol);
}
}
@ -157,7 +157,7 @@ BitstreamManager build_device_bitstream(const VprContext& vpr_ctx,
size_t num_bits_to_reserve = rec_estimate_device_bitstream_num_bits(openfpga_ctx.module_graph(),
top_module,
top_module,
openfpga_ctx.arch().config_protocol.type());
openfpga_ctx.arch().config_protocol);
bitstream_manager.reserve_bits(num_bits_to_reserve);
VTR_LOGV(verbose, "Reserved %lu configuration bits\n", num_bits_to_reserve);

15
openfpga/src/utils/memory_utils.cpp
View File

@ -429,13 +429,13 @@ size_t generate_pb_sram_port_size(const e_config_protocol_type sram_orgz_type,
return sram_port_size;
}
size_t estimate_num_configurable_children_to_skip_by_config_protocol(e_config_protocol_type config_protocol_type,
size_t estimate_num_configurable_children_to_skip_by_config_protocol(const ConfigProtocol& config_protocol,
size_t curr_region_num_config_child) {
size_t num_child_to_skip = 0;
/* Frame-based configuration protocol will have 1 decoder
* if there are more than 1 configurable children
*/
if ( (CONFIG_MEM_FRAME_BASED == config_protocol_type)
if ( (CONFIG_MEM_FRAME_BASED == config_protocol.type())
&& (2 <= curr_region_num_config_child)) {
num_child_to_skip = 1;
}
@ -443,10 +443,17 @@ size_t estimate_num_configurable_children_to_skip_by_config_protocol(e_config_pr
/* Memory configuration protocol will have 2 decoders
* at the top-level
*/
if (CONFIG_MEM_MEMORY_BANK == config_protocol_type
|| CONFIG_MEM_QL_MEMORY_BANK == config_protocol_type) {
if (CONFIG_MEM_MEMORY_BANK == config_protocol.type()
|| CONFIG_MEM_QL_MEMORY_BANK == config_protocol.type()) {
VTR_ASSERT(2 <= curr_region_num_config_child);
num_child_to_skip = 2;
/* If flatten bus is used, BL/WL may not need decoders */
if (BLWL_PROTOCOL_FLATTEN == config_protocol.bl_protocol_type()) {
num_child_to_skip--;
}
if (BLWL_PROTOCOL_FLATTEN == config_protocol.wl_protocol_type()) {
num_child_to_skip--;
}
}
return num_child_to_skip;

3
openfpga/src/utils/memory_utils.h
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@ -7,6 +7,7 @@
#include <vector>
#include "openfpga_port.h"
#include "circuit_types.h"
#include "config_protocol.h"
#include "module_manager.h"
/********************************************************************
@ -46,7 +47,7 @@ size_t generate_pb_sram_port_size(const e_config_protocol_type sram_orgz_type,
* (they are included in the list for bitstream generator usage)
* The number of decoders depends on the type of configuration protocol.
*/
size_t estimate_num_configurable_children_to_skip_by_config_protocol(e_config_protocol_type config_protocol_type,
size_t estimate_num_configurable_children_to_skip_by_config_protocol(const ConfigProtocol& config_protocol,
size_t curr_region_num_config_child);
} /* end namespace openfpga */