diff --git a/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_lut.cpp b/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_lut.cpp
index 25a691935..519e59c2a 100644
--- a/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_lut.cpp
+++ b/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_lut.cpp
@@ -355,7 +355,7 @@ void print_verilog_submodule_luts(ModuleManager& module_manager,
   /* Create file */
   vpr_printf(TIO_MESSAGE_INFO,
              "Generating Verilog netlist for LUTs (%s)...\n",
-             __FILE__, __LINE__, verilog_fname.c_str()); 
+             verilog_fname.c_str()); 
 
   print_verilog_file_header(fp, "Look-Up Tables");