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[test] add a new unit test

This commit is contained in:
tangxifan 2024-06-24 19:13:36 -07:00
parent 22bee35fd1
commit 272d78eb43
1 changed files with 4 additions and 0 deletions
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4
libs/libclkarchopenfpga/test/xml_io_clock_network.cpp
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@ -22,6 +22,10 @@ int main(int argc, const char** argv) {
/* Validate before write out */ /* Validate before write out */
if (!clk_ntwk.link()) { if (!clk_ntwk.link()) {
VTR_LOG_ERROR("Invalid clock network when linking.\n");
exit(1);
}
if (!clk_ntwk.validate()) {
VTR_LOG_ERROR("Invalid clock network.\n"); VTR_LOG_ERROR("Invalid clock network.\n");
exit(1); exit(1);
} }