From 26c294679a1914aa4eb307699e8c9388d975995c Mon Sep 17 00:00:00 2001 From: tangxifan Date: Fri, 6 Jan 2023 20:52:37 -0800 Subject: [PATCH] [core] now setup commands follow templates --- .../check_netlist_naming_conflict.cpp | 65 +- .../check_netlist_naming_conflict.h | 18 +- .../check_netlist_naming_conflict_template.h | 84 ++ openfpga/src/base/openfpga_build_fabric.cpp | 236 ------ openfpga/src/base/openfpga_build_fabric.h | 30 - openfpga/src/base/openfpga_link_arch.cpp | 219 ------ openfpga/src/base/openfpga_link_arch.h | 23 - .../base/openfpga_lut_truth_table_fixup.cpp | 33 +- .../src/base/openfpga_lut_truth_table_fixup.h | 5 +- .../openfpga_lut_truth_table_fixup_template.h | 53 ++ openfpga/src/base/openfpga_pb_pin_fixup.cpp | 34 +- openfpga/src/base/openfpga_pb_pin_fixup.h | 10 +- .../src/base/openfpga_pb_pin_fixup_template.h | 54 ++ openfpga/src/base/openfpga_pcf2place.h | 23 - ...lace.cpp => openfpga_pcf2place_template.h} | 17 +- openfpga/src/base/openfpga_read_arch.h | 42 - ...arch.cpp => openfpga_read_arch_template.h} | 32 +- openfpga/src/base/openfpga_setup_command.cpp | 691 +---------------- .../base/openfpga_setup_command_template.h | 722 ++++++++++++++++++ openfpga/src/base/openfpga_write_gsb.h | 23 - ..._gsb.cpp => openfpga_write_gsb_template.h} | 15 +- .../src/utils/openfpga_rr_graph_utils.cpp | 37 + openfpga/src/utils/openfpga_rr_graph_utils.h | 13 + 23 files changed, 1027 insertions(+), 1452 deletions(-) create mode 100644 openfpga/src/annotation/check_netlist_naming_conflict_template.h delete mode 100644 openfpga/src/base/openfpga_build_fabric.cpp delete mode 100644 openfpga/src/base/openfpga_build_fabric.h delete mode 100644 openfpga/src/base/openfpga_link_arch.cpp delete mode 100644 openfpga/src/base/openfpga_link_arch.h create mode 100644 openfpga/src/base/openfpga_lut_truth_table_fixup_template.h create mode 100644 openfpga/src/base/openfpga_pb_pin_fixup_template.h delete mode 100644 openfpga/src/base/openfpga_pcf2place.h rename openfpga/src/base/{openfpga_pcf2place.cpp => openfpga_pcf2place_template.h} (94%) delete mode 100644 openfpga/src/base/openfpga_read_arch.h rename openfpga/src/base/{openfpga_read_arch.cpp => openfpga_read_arch_template.h} (92%) create mode 100644 openfpga/src/base/openfpga_setup_command_template.h delete mode 100644 openfpga/src/base/openfpga_write_gsb.h rename openfpga/src/base/{openfpga_write_gsb.cpp => openfpga_write_gsb_template.h} (91%) create mode 100644 openfpga/src/utils/openfpga_rr_graph_utils.cpp create mode 100644 openfpga/src/utils/openfpga_rr_graph_utils.h diff --git a/openfpga/src/annotation/check_netlist_naming_conflict.cpp b/openfpga/src/annotation/check_netlist_naming_conflict.cpp index efc8a32d9..5b193b97d 100644 --- a/openfpga/src/annotation/check_netlist_naming_conflict.cpp +++ b/openfpga/src/annotation/check_netlist_naming_conflict.cpp @@ -80,7 +80,7 @@ static std::string fix_name_contain_sensitive_chars( * - Iterate over all the nets and see if any net name contain * any sensitive character *******************************************************************/ -static size_t detect_netlist_naming_conflict( +size_t detect_netlist_naming_conflict( const AtomNetlist& atom_netlist, const std::string& sensitive_chars) { size_t num_conflicts = 0; @@ -119,7 +119,7 @@ static size_t detect_netlist_naming_conflict( * - Iterate over all the nets and correct any net name that contains * any sensitive character *******************************************************************/ -static void fix_netlist_naming_conflict( +void fix_netlist_naming_conflict( const AtomNetlist& atom_netlist, const std::string& sensitive_chars, const std::string& fix_chars, VprNetlistAnnotation& vpr_netlist_annotation) { size_t num_fixes = 0; @@ -162,7 +162,7 @@ static void fix_netlist_naming_conflict( * Report all the fix-up in the naming of netlist components, * i.e., blocks, nets *******************************************************************/ -static void print_netlist_naming_fix_report( +void print_netlist_naming_fix_report( const std::string& fname, const AtomNetlist& atom_netlist, const VprNetlistAnnotation& vpr_netlist_annotation) { /* Create a file handler */ @@ -229,64 +229,5 @@ static void print_netlist_naming_fix_report( fp.close(); } -/******************************************************************** - * Top-level function to detect and correct any naming - * in the users' BLIF netlist that violates the syntax of OpenFPGA - * fabric generator, i.e., Verilog generator and SPICE generator - *******************************************************************/ -int check_netlist_naming_conflict(OpenfpgaContext& openfpga_context, - const Command& cmd, - const CommandContext& cmd_context) { - vtr::ScopedStartFinishTimer timer( - "Check naming violations of netlist blocks and nets"); - - /* By default, we replace all the illegal characters with '_' */ - const std::string& sensitive_chars(".,:;\'\"+-<>()[]{}!@#$%^&*~`?/"); - const std::string& fix_chars("____________________________"); - - CommandOptionId opt_fix = cmd.option("fix"); - - /* Do the main job first: detect any naming in the BLIF netlist that violates - * the syntax */ - if (false == cmd_context.option_enable(cmd, opt_fix)) { - size_t num_conflicts = - detect_netlist_naming_conflict(g_vpr_ctx.atom().nlist, sensitive_chars); - VTR_LOGV_ERROR( - (0 < num_conflicts && (false == cmd_context.option_enable(cmd, opt_fix))), - "Found %ld naming conflicts in the netlist. Please correct so as to use " - "any fabric generators.\n", - num_conflicts); - VTR_LOGV(0 == num_conflicts, - "Check naming conflicts in the netlist passed.\n"); - - /* If we see conflicts, report minor error */ - if (0 < num_conflicts) { - return CMD_EXEC_MINOR_ERROR; - } - - /* Otherwise, we should see zero conflicts */ - VTR_ASSERT(0 == num_conflicts); - return CMD_EXEC_SUCCESS; - } - - /* If the auto correction is enabled, we apply a fix */ - if (true == cmd_context.option_enable(cmd, opt_fix)) { - fix_netlist_naming_conflict( - g_vpr_ctx.atom().nlist, sensitive_chars, fix_chars, - openfpga_context.mutable_vpr_netlist_annotation()); - - CommandOptionId opt_report = cmd.option("report"); - if (true == cmd_context.option_enable(cmd, opt_report)) { - print_netlist_naming_fix_report( - cmd_context.option_value(cmd, opt_report), g_vpr_ctx.atom().nlist, - openfpga_context.vpr_netlist_annotation()); - VTR_LOG("Naming fix-up report is generated to file '%s'\n", - cmd_context.option_value(cmd, opt_report).c_str()); - } - } - - /* TODO: should identify the error code from internal function execution */ - return CMD_EXEC_SUCCESS; -} } /* end namespace openfpga */ diff --git a/openfpga/src/annotation/check_netlist_naming_conflict.h b/openfpga/src/annotation/check_netlist_naming_conflict.h index 1dc064117..1ad3ee3fc 100644 --- a/openfpga/src/annotation/check_netlist_naming_conflict.h +++ b/openfpga/src/annotation/check_netlist_naming_conflict.h @@ -6,7 +6,9 @@ *******************************************************************/ #include "command.h" #include "command_context.h" -#include "openfpga_context.h" +#include +#include "atom_netlist.h" +#include "vpr_netlist_annotation.h" /******************************************************************** * Function declaration @@ -15,9 +17,17 @@ /* begin namespace openfpga */ namespace openfpga { -int check_netlist_naming_conflict(OpenfpgaContext& openfpga_context, - const Command& cmd, - const CommandContext& cmd_context); +size_t detect_netlist_naming_conflict( + const AtomNetlist& atom_netlist, const std::string& sensitive_chars); + +void fix_netlist_naming_conflict( + const AtomNetlist& atom_netlist, const std::string& sensitive_chars, + const std::string& fix_chars, VprNetlistAnnotation& vpr_netlist_annotation); + +void print_netlist_naming_fix_report( + const std::string& fname, const AtomNetlist& atom_netlist, + const VprNetlistAnnotation& vpr_netlist_annotation); + } /* end namespace openfpga */ diff --git a/openfpga/src/annotation/check_netlist_naming_conflict_template.h b/openfpga/src/annotation/check_netlist_naming_conflict_template.h new file mode 100644 index 000000000..51f07ef18 --- /dev/null +++ b/openfpga/src/annotation/check_netlist_naming_conflict_template.h @@ -0,0 +1,84 @@ +#ifndef CHECK_NETLIST_NAMING_CONFLICT_TEMPLATE_H +#define CHECK_NETLIST_NAMING_CONFLICT_TEMPLATE_H + +/******************************************************************** + * Include header files that are required by function declaration + *******************************************************************/ +#include "command.h" +#include "command_context.h" +#include "command_exit_codes.h" +#include "vtr_time.h" +#include "check_netlist_naming_conflict.h" + +/******************************************************************** + * Function declaration + *******************************************************************/ + +/* begin namespace openfpga */ +namespace openfpga { + +/******************************************************************** + * Top-level function to detect and correct any naming + * in the users' BLIF netlist that violates the syntax of OpenFPGA + * fabric generator, i.e., Verilog generator and SPICE generator + *******************************************************************/ +template +int check_netlist_naming_conflict_template(T& openfpga_context, + const Command& cmd, + const CommandContext& cmd_context) { + vtr::ScopedStartFinishTimer timer( + "Check naming violations of netlist blocks and nets"); + + /* By default, we replace all the illegal characters with '_' */ + const std::string& sensitive_chars(".,:;\'\"+-<>()[]{}!@#$%^&*~`?/"); + const std::string& fix_chars("____________________________"); + + CommandOptionId opt_fix = cmd.option("fix"); + + /* Do the main job first: detect any naming in the BLIF netlist that violates + * the syntax */ + if (false == cmd_context.option_enable(cmd, opt_fix)) { + size_t num_conflicts = + detect_netlist_naming_conflict(g_vpr_ctx.atom().nlist, sensitive_chars); + VTR_LOGV_ERROR( + (0 < num_conflicts && (false == cmd_context.option_enable(cmd, opt_fix))), + "Found %ld naming conflicts in the netlist. Please correct so as to use " + "any fabric generators.\n", + num_conflicts); + VTR_LOGV(0 == num_conflicts, + "Check naming conflicts in the netlist passed.\n"); + + /* If we see conflicts, report minor error */ + if (0 < num_conflicts) { + return CMD_EXEC_MINOR_ERROR; + } + + /* Otherwise, we should see zero conflicts */ + VTR_ASSERT(0 == num_conflicts); + return CMD_EXEC_SUCCESS; + } + + /* If the auto correction is enabled, we apply a fix */ + if (true == cmd_context.option_enable(cmd, opt_fix)) { + fix_netlist_naming_conflict( + g_vpr_ctx.atom().nlist, sensitive_chars, fix_chars, + openfpga_context.mutable_vpr_netlist_annotation()); + + CommandOptionId opt_report = cmd.option("report"); + if (true == cmd_context.option_enable(cmd, opt_report)) { + print_netlist_naming_fix_report( + cmd_context.option_value(cmd, opt_report), g_vpr_ctx.atom().nlist, + openfpga_context.vpr_netlist_annotation()); + VTR_LOG("Naming fix-up report is generated to file '%s'\n", + cmd_context.option_value(cmd, opt_report).c_str()); + } + } + + /* TODO: should identify the error code from internal function execution */ + return CMD_EXEC_SUCCESS; +} + + +} /* end namespace openfpga */ + +#endif diff --git a/openfpga/src/base/openfpga_build_fabric.cpp b/openfpga/src/base/openfpga_build_fabric.cpp deleted file mode 100644 index 3c6194aab..000000000 --- a/openfpga/src/base/openfpga_build_fabric.cpp +++ /dev/null @@ -1,236 +0,0 @@ -/******************************************************************** - * This file includes functions to compress the hierachy of routing architecture - *******************************************************************/ -/* Headers from vtrutil library */ -#include "vtr_log.h" -#include "vtr_time.h" - -/* Headers from openfpgashell library */ -#include "command_exit_codes.h" - -/* Headers from fabrickey library */ -#include "build_device_module.h" -#include "build_fabric_global_port_info.h" -#include "build_fabric_io_location_map.h" -#include "device_rr_gsb.h" -#include "device_rr_gsb_utils.h" -#include "fabric_hierarchy_writer.h" -#include "fabric_key_writer.h" -#include "openfpga_build_fabric.h" -#include "read_xml_fabric_key.h" - -/* Include global variables of VPR */ -#include "globals.h" - -/* begin namespace openfpga */ -namespace openfpga { - -/******************************************************************** - * Identify the unique GSBs from the Device RR GSB arrays - * This function should only be called after the GSB builder is done - *******************************************************************/ -static void compress_routing_hierarchy(OpenfpgaContext& openfpga_ctx, - const bool& verbose_output) { - vtr::ScopedStartFinishTimer timer( - "Identify unique General Switch Blocks (GSBs)"); - - /* Build unique module lists */ - openfpga_ctx.mutable_device_rr_gsb().build_unique_module( - g_vpr_ctx.device().rr_graph); - - /* Report the stats */ - VTR_LOGV( - verbose_output, - "Detected %lu unique X-direction connection blocks from a total of %d " - "(compression rate=%.2f%)\n", - openfpga_ctx.device_rr_gsb().get_num_cb_unique_module(CHANX), - find_device_rr_gsb_num_cb_modules(openfpga_ctx.device_rr_gsb(), CHANX), - 100. * - ((float)find_device_rr_gsb_num_cb_modules(openfpga_ctx.device_rr_gsb(), - CHANX) / - (float)openfpga_ctx.device_rr_gsb().get_num_cb_unique_module(CHANX) - - 1.)); - - VTR_LOGV( - verbose_output, - "Detected %lu unique Y-direction connection blocks from a total of %d " - "(compression rate=%.2f%)\n", - openfpga_ctx.device_rr_gsb().get_num_cb_unique_module(CHANY), - find_device_rr_gsb_num_cb_modules(openfpga_ctx.device_rr_gsb(), CHANY), - 100. * - ((float)find_device_rr_gsb_num_cb_modules(openfpga_ctx.device_rr_gsb(), - CHANY) / - (float)openfpga_ctx.device_rr_gsb().get_num_cb_unique_module(CHANY) - - 1.)); - - VTR_LOGV( - verbose_output, - "Detected %lu unique switch blocks from a total of %d (compression " - "rate=%.2f%)\n", - openfpga_ctx.device_rr_gsb().get_num_sb_unique_module(), - find_device_rr_gsb_num_sb_modules(openfpga_ctx.device_rr_gsb()), - 100. * - ((float)find_device_rr_gsb_num_sb_modules(openfpga_ctx.device_rr_gsb()) / - (float)openfpga_ctx.device_rr_gsb().get_num_sb_unique_module() - - 1.)); - - VTR_LOG( - "Detected %lu unique general switch blocks from a total of %d (compression " - "rate=%.2f%)\n", - openfpga_ctx.device_rr_gsb().get_num_gsb_unique_module(), - find_device_rr_gsb_num_gsb_modules(openfpga_ctx.device_rr_gsb()), - 100. * - ((float)find_device_rr_gsb_num_gsb_modules(openfpga_ctx.device_rr_gsb()) / - (float)openfpga_ctx.device_rr_gsb().get_num_gsb_unique_module() - - 1.)); -} - -/******************************************************************** - * Build the module graph for FPGA device - *******************************************************************/ -int build_fabric(OpenfpgaContext& openfpga_ctx, const Command& cmd, - const CommandContext& cmd_context) { - CommandOptionId opt_frame_view = cmd.option("frame_view"); - CommandOptionId opt_compress_routing = cmd.option("compress_routing"); - CommandOptionId opt_duplicate_grid_pin = cmd.option("duplicate_grid_pin"); - CommandOptionId opt_gen_random_fabric_key = - cmd.option("generate_random_fabric_key"); - CommandOptionId opt_write_fabric_key = cmd.option("write_fabric_key"); - CommandOptionId opt_load_fabric_key = cmd.option("load_fabric_key"); - CommandOptionId opt_verbose = cmd.option("verbose"); - - if (true == cmd_context.option_enable(cmd, opt_compress_routing)) { - compress_routing_hierarchy(openfpga_ctx, - cmd_context.option_enable(cmd, opt_verbose)); - /* Update flow manager to enable compress routing */ - openfpga_ctx.mutable_flow_manager().set_compress_routing(true); - } - - VTR_LOG("\n"); - - /* Record the execution status in curr_status for each command - * and summarize them in the final status - */ - int curr_status = CMD_EXEC_SUCCESS; - int final_status = CMD_EXEC_SUCCESS; - - /* Load fabric key from file */ - FabricKey predefined_fabric_key; - if (true == cmd_context.option_enable(cmd, opt_load_fabric_key)) { - std::string fkey_fname = cmd_context.option_value(cmd, opt_load_fabric_key); - VTR_ASSERT(false == fkey_fname.empty()); - predefined_fabric_key = read_xml_fabric_key(fkey_fname.c_str()); - } - - VTR_LOG("\n"); - - curr_status = build_device_module_graph( - openfpga_ctx.mutable_module_graph(), openfpga_ctx.mutable_decoder_lib(), - openfpga_ctx.mutable_blwl_shift_register_banks(), - const_cast(openfpga_ctx), g_vpr_ctx.device(), - cmd_context.option_enable(cmd, opt_frame_view), - cmd_context.option_enable(cmd, opt_compress_routing), - cmd_context.option_enable(cmd, opt_duplicate_grid_pin), - predefined_fabric_key, - cmd_context.option_enable(cmd, opt_gen_random_fabric_key), - cmd_context.option_enable(cmd, opt_verbose)); - - /* If there is any error, final status cannot be overwritten by a success flag - */ - if (CMD_EXEC_SUCCESS != curr_status) { - final_status = curr_status; - } - - /* Build I/O location map */ - openfpga_ctx.mutable_io_location_map() = build_fabric_io_location_map( - openfpga_ctx.module_graph(), g_vpr_ctx.device().grid); - - /* Build fabric global port information */ - openfpga_ctx.mutable_fabric_global_port_info() = - build_fabric_global_port_info( - openfpga_ctx.module_graph(), openfpga_ctx.arch().config_protocol, - openfpga_ctx.arch().tile_annotations, openfpga_ctx.arch().circuit_lib); - - /* Output fabric key if user requested */ - if (true == cmd_context.option_enable(cmd, opt_write_fabric_key)) { - std::string fkey_fname = - cmd_context.option_value(cmd, opt_write_fabric_key); - VTR_ASSERT(false == fkey_fname.empty()); - curr_status = - write_fabric_key_to_xml_file(openfpga_ctx.module_graph(), fkey_fname, - openfpga_ctx.arch().config_protocol, - openfpga_ctx.blwl_shift_register_banks(), - cmd_context.option_enable(cmd, opt_verbose)); - /* If there is any error, final status cannot be overwritten by a success - * flag */ - if (CMD_EXEC_SUCCESS != curr_status) { - final_status = curr_status; - } - } - - return final_status; -} - -/******************************************************************** - * Write hierarchy of the module graph for FPGA device to a file - *******************************************************************/ -int write_fabric_hierarchy(const OpenfpgaContext& openfpga_ctx, - const Command& cmd, - const CommandContext& cmd_context) { - CommandOptionId opt_verbose = cmd.option("verbose"); - - /* Check the option '--file' is enabled or not - * Actually, it must be enabled as the shell interface will check - * before reaching this fuction - */ - CommandOptionId opt_file = cmd.option("file"); - VTR_ASSERT(true == cmd_context.option_enable(cmd, opt_file)); - VTR_ASSERT(false == cmd_context.option_value(cmd, opt_file).empty()); - - /* Default depth requirement, will not stop until the leaf */ - int depth = -1; - CommandOptionId opt_depth = cmd.option("depth"); - if (true == cmd_context.option_enable(cmd, opt_depth)) { - depth = std::atoi(cmd_context.option_value(cmd, opt_depth).c_str()); - /* Error out if we have negative depth */ - if (0 > depth) { - VTR_LOG_ERROR( - "Invalid depth '%d' which should be 0 or a positive number!\n", depth); - return CMD_EXEC_FATAL_ERROR; - } - } - - std::string hie_file_name = cmd_context.option_value(cmd, opt_file); - - /* Write hierarchy to a file */ - return write_fabric_hierarchy_to_text_file( - openfpga_ctx.module_graph(), hie_file_name, size_t(depth), - cmd_context.option_enable(cmd, opt_verbose)); -} - -/******************************************************************** - * Write the I/O information of module graph to a file - *******************************************************************/ -int write_fabric_io_info(const OpenfpgaContext& openfpga_ctx, - const Command& cmd, - const CommandContext& cmd_context) { - CommandOptionId opt_verbose = cmd.option("verbose"); - CommandOptionId opt_no_time_stamp = cmd.option("no_time_stamp"); - - /* Check the option '--file' is enabled or not - * Actually, it must be enabled as the shell interface will check - * before reaching this fuction - */ - CommandOptionId opt_file = cmd.option("file"); - VTR_ASSERT(true == cmd_context.option_enable(cmd, opt_file)); - VTR_ASSERT(false == cmd_context.option_value(cmd, opt_file).empty()); - - std::string file_name = cmd_context.option_value(cmd, opt_file); - - /* Write hierarchy to a file */ - return openfpga_ctx.io_location_map().write_to_xml_file( - file_name, !cmd_context.option_enable(cmd, opt_no_time_stamp), - cmd_context.option_enable(cmd, opt_verbose)); -} - -} /* end namespace openfpga */ diff --git a/openfpga/src/base/openfpga_build_fabric.h b/openfpga/src/base/openfpga_build_fabric.h deleted file mode 100644 index db295edaf..000000000 --- a/openfpga/src/base/openfpga_build_fabric.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef OPENFPGA_BUILD_FABRIC_H -#define OPENFPGA_BUILD_FABRIC_H - -/******************************************************************** - * Include header files that are required by function declaration - *******************************************************************/ -#include "command.h" -#include "command_context.h" -#include "openfpga_context.h" - -/******************************************************************** - * Function declaration - *******************************************************************/ - -/* begin namespace openfpga */ -namespace openfpga { - -int build_fabric(OpenfpgaContext& openfpga_ctx, const Command& cmd, - const CommandContext& cmd_context); - -int write_fabric_hierarchy(const OpenfpgaContext& openfpga_ctx, - const Command& cmd, - const CommandContext& cmd_context); - -int write_fabric_io_info(const OpenfpgaContext& openfpga_ctx, - const Command& cmd, const CommandContext& cmd_context); - -} /* end namespace openfpga */ - -#endif diff --git a/openfpga/src/base/openfpga_link_arch.cpp b/openfpga/src/base/openfpga_link_arch.cpp deleted file mode 100644 index 9c2b666b0..000000000 --- a/openfpga/src/base/openfpga_link_arch.cpp +++ /dev/null @@ -1,219 +0,0 @@ -/******************************************************************** - * This file includes functions to read an OpenFPGA architecture file - * which are built on the libarchopenfpga library - *******************************************************************/ - -/* Headers from vtrutil library */ -#include "vtr_assert.h" -#include "vtr_log.h" -#include "vtr_time.h" - -/* Headers from openfpgashell library */ -#include "command_exit_codes.h" - -/* Headers from vpr library */ -#include "annotate_bitstream_setting.h" -#include "annotate_clustering.h" -#include "annotate_pb_graph.h" -#include "annotate_pb_types.h" -#include "annotate_physical_tiles.h" -#include "annotate_placement.h" -#include "annotate_rr_graph.h" -#include "annotate_simulation_setting.h" -#include "build_tile_direct.h" -#include "mux_library_builder.h" -#include "openfpga_annotate_routing.h" -#include "openfpga_link_arch.h" -#include "pb_type_utils.h" -#include "read_activity.h" -#include "vpr_device_annotation.h" - -/* Include global variables of VPR */ -#include "globals.h" - -/* begin namespace openfpga */ -namespace openfpga { - -/******************************************************************** - * A function to identify if the routing resource graph generated by - * VPR is support by OpenFPGA - * - Currently we only support uni-directional - * It means every routing tracks must have a direction - *******************************************************************/ -static bool is_vpr_rr_graph_supported(const RRGraphView& rr_graph) { - /* Check if the rr_graph is uni-directional*/ - for (const RRNodeId& node : rr_graph.nodes()) { - if (CHANX != rr_graph.node_type(node) && - CHANY != rr_graph.node_type(node)) { - continue; - } - if (Direction::BIDIR == rr_graph.node_direction(node)) { - VTR_LOG_ERROR( - "Routing resource graph is bi-directional. OpenFPGA currently supports " - "uni-directional routing architecture only.\n"); - return false; - } - if (Direction::NONE == rr_graph.node_direction(node)) { - VTR_LOG_ERROR( - "Routing resource graph contains routing tracks which has not specific " - "direction. OpenFPGA currently supports uni-directional routing " - "architecture only.\n"); - return false; - } - } - - return true; -} - -/******************************************************************** - * Top-level function to link openfpga architecture to VPR, including: - * - physical pb_type - * - mode selection bits for pb_type and pb interconnect - * - circuit models for pb_type and pb interconnect - * - physical pb_graph nodes and pb_graph pins - * - circuit models for global routing architecture - *******************************************************************/ -int link_arch(OpenfpgaContext& openfpga_ctx, const Command& cmd, - const CommandContext& cmd_context) { - vtr::ScopedStartFinishTimer timer( - "Link OpenFPGA architecture to VPR architecture"); - - CommandOptionId opt_activity_file = cmd.option("activity_file"); - CommandOptionId opt_sort_edge = cmd.option("sort_gsb_chan_node_in_edges"); - CommandOptionId opt_verbose = cmd.option("verbose"); - - /* Build fast look-up between physical tile pin index and port information */ - build_physical_tile_pin2port_info( - g_vpr_ctx.device(), openfpga_ctx.mutable_vpr_device_annotation()); - - /* Annotate pb_type graphs - * - physical pb_type - * - mode selection bits for pb_type and pb interconnect - * - circuit models for pb_type and pb interconnect - */ - annotate_pb_types(g_vpr_ctx.device(), openfpga_ctx.arch(), - openfpga_ctx.mutable_vpr_device_annotation(), - cmd_context.option_enable(cmd, opt_verbose)); - - /* Annotate pb_graph_nodes - * - Give unique index to each node in the same type - * - Bind operating pb_graph_node to their physical pb_graph_node - * - Bind pins from operating pb_graph_node to their physical pb_graph_node - * pins - */ - annotate_pb_graph(g_vpr_ctx.device(), - openfpga_ctx.mutable_vpr_device_annotation(), - cmd_context.option_enable(cmd, opt_verbose)); - - /* Annotate routing architecture to circuit library */ - annotate_rr_graph_circuit_models(g_vpr_ctx.device(), openfpga_ctx.arch(), - openfpga_ctx.mutable_vpr_device_annotation(), - cmd_context.option_enable(cmd, opt_verbose)); - - /* Annotate routing results: - * - net mapping to each rr_node - * - previous nodes driving each rr_node - */ - openfpga_ctx.mutable_vpr_routing_annotation().init( - g_vpr_ctx.device().rr_graph); - - annotate_vpr_rr_node_nets(g_vpr_ctx.device(), g_vpr_ctx.clustering(), - g_vpr_ctx.routing(), - openfpga_ctx.mutable_vpr_routing_annotation(), - cmd_context.option_enable(cmd, opt_verbose)); - - annotate_rr_node_previous_nodes(g_vpr_ctx.device(), g_vpr_ctx.clustering(), - g_vpr_ctx.routing(), - openfpga_ctx.mutable_vpr_routing_annotation(), - cmd_context.option_enable(cmd, opt_verbose)); - - /* Build the routing graph annotation - * - RRGSB - * - DeviceRRGSB - */ - if (false == is_vpr_rr_graph_supported(g_vpr_ctx.device().rr_graph)) { - return CMD_EXEC_FATAL_ERROR; - } - - /* Build incoming edges as VPR only builds fan-out edges for each node */ - g_vpr_ctx.mutable_device().rr_graph_builder.build_in_edges(); - VTR_LOG("Built %ld incoming edges for routing resource graph\n", - g_vpr_ctx.device().rr_graph.in_edges_count()); - VTR_ASSERT(g_vpr_ctx.device().rr_graph.validate_in_edges()); - annotate_device_rr_gsb(g_vpr_ctx.device(), - openfpga_ctx.mutable_device_rr_gsb(), - cmd_context.option_enable(cmd, opt_verbose)); - - if (true == cmd_context.option_enable(cmd, opt_sort_edge)) { - sort_device_rr_gsb_chan_node_in_edges( - g_vpr_ctx.device().rr_graph, openfpga_ctx.mutable_device_rr_gsb(), - cmd_context.option_enable(cmd, opt_verbose)); - sort_device_rr_gsb_ipin_node_in_edges( - g_vpr_ctx.device().rr_graph, openfpga_ctx.mutable_device_rr_gsb(), - cmd_context.option_enable(cmd, opt_verbose)); - } - - /* Build multiplexer library */ - openfpga_ctx.mutable_mux_lib() = build_device_mux_library( - g_vpr_ctx.device(), const_cast(openfpga_ctx)); - - /* Build tile direct annotation */ - openfpga_ctx.mutable_tile_direct() = build_device_tile_direct( - g_vpr_ctx.device(), openfpga_ctx.arch().arch_direct, - cmd_context.option_enable(cmd, opt_verbose)); - - /* Annotate clustering results */ - if (CMD_EXEC_FATAL_ERROR == - annotate_post_routing_cluster_sync_results( - g_vpr_ctx.device(), g_vpr_ctx.clustering(), - openfpga_ctx.mutable_vpr_clustering_annotation())) { - return CMD_EXEC_FATAL_ERROR; - } - - /* Annotate placement results */ - annotate_mapped_blocks(g_vpr_ctx.device(), g_vpr_ctx.clustering(), - g_vpr_ctx.placement(), - openfpga_ctx.mutable_vpr_placement_annotation()); - - /* Read activity file is manadatory in the following flow-run settings - * - When users specify that number of clock cycles - * should be inferred from FPGA implmentation - * - When FPGA-SPICE is enabled - */ - std::unordered_map net_activity; - if (true == cmd_context.option_enable(cmd, opt_activity_file)) { - net_activity = - read_activity(g_vpr_ctx.atom().nlist, - cmd_context.option_value(cmd, opt_activity_file).c_str()); - } - - /* TODO: Annotate the number of clock cycles and clock frequency by following - * VPR results We SHOULD create a new simulation setting for OpenFPGA use only - * Avoid overwrite the raw data achieved when parsing!!! - */ - /* OVERWRITE the simulation setting in openfpga context from the arch - * TODO: This will be removed when openfpga flow is updated - */ - // openfpga_ctx.mutable_simulation_setting() = - // openfpga_ctx.mutable_arch().sim_setting; - if (CMD_EXEC_FATAL_ERROR == - annotate_simulation_setting(g_vpr_ctx.atom(), g_vpr_ctx.clustering(), - net_activity, - openfpga_ctx.mutable_simulation_setting())) { - return CMD_EXEC_FATAL_ERROR; - } - - /* Build bitstream annotation based on bitstream settings */ - if (CMD_EXEC_FATAL_ERROR == - annotate_bitstream_setting( - openfpga_ctx.bitstream_setting(), g_vpr_ctx.device(), - openfpga_ctx.vpr_device_annotation(), - openfpga_ctx.mutable_vpr_bitstream_annotation())) { - return CMD_EXEC_FATAL_ERROR; - } - - /* TODO: should identify the error code from internal function execution */ - return CMD_EXEC_SUCCESS; -} - -} /* end namespace openfpga */ diff --git a/openfpga/src/base/openfpga_link_arch.h b/openfpga/src/base/openfpga_link_arch.h deleted file mode 100644 index f2f66f941..000000000 --- a/openfpga/src/base/openfpga_link_arch.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef OPENFPGA_LINK_ARCH_H -#define OPENFPGA_LINK_ARCH_H - -/******************************************************************** - * Include header files that are required by function declaration - *******************************************************************/ -#include "command.h" -#include "command_context.h" -#include "openfpga_context.h" - -/******************************************************************** - * Function declaration - *******************************************************************/ - -/* begin namespace openfpga */ -namespace openfpga { - -int link_arch(OpenfpgaContext& openfpga_context, const Command& cmd, - const CommandContext& cmd_context); - -} /* end namespace openfpga */ - -#endif diff --git a/openfpga/src/base/openfpga_lut_truth_table_fixup.cpp b/openfpga/src/base/openfpga_lut_truth_table_fixup.cpp index 2f846e592..dacd6d131 100644 --- a/openfpga/src/base/openfpga_lut_truth_table_fixup.cpp +++ b/openfpga/src/base/openfpga_lut_truth_table_fixup.cpp @@ -7,9 +7,6 @@ #include "vtr_log.h" #include "vtr_time.h" -/* Headers from openfpgashell library */ -#include "command_exit_codes.h" - /* Headers from vpr library */ #include "lut_utils.h" #include "openfpga_lut_truth_table_fixup.h" @@ -176,7 +173,7 @@ static void rec_adapt_lut_pb_tt( * Main function to fix up truth table for each LUT used in FPGA * This function will walk through each clustered block *******************************************************************/ -static void update_lut_tt_with_post_packing_results( +void update_lut_tt_with_post_packing_results( const AtomContext& atom_ctx, const ClusteringContext& clustering_ctx, VprClusteringAnnotation& vpr_clustering_annotation, const bool& verbose) { for (auto blk_id : clustering_ctx.clb_nlist.blocks()) { @@ -186,32 +183,4 @@ static void update_lut_tt_with_post_packing_results( } } -/******************************************************************** - * Top-level function to fix up the lut truth table results after packing is - *done The problem comes from a mismatch between the packing results and - * original truth tables in users' BLIF file - * As LUT inputs are equivalent in nature, the router of packer will try - * to swap the net mapping among these pins so as to achieve best - * routing optimization. - * However, it will cause the original truth table out-of-date when packing is - *done. This function aims to fix the mess after packing so that the truth table - * can be synchronized - *******************************************************************/ -int lut_truth_table_fixup(OpenfpgaContext& openfpga_context, const Command& cmd, - const CommandContext& cmd_context) { - vtr::ScopedStartFinishTimer timer( - "Fix up LUT truth tables after packing optimization"); - - CommandOptionId opt_verbose = cmd.option("verbose"); - - /* Apply fix-up to each packed block */ - update_lut_tt_with_post_packing_results( - g_vpr_ctx.atom(), g_vpr_ctx.clustering(), - openfpga_context.mutable_vpr_clustering_annotation(), - cmd_context.option_enable(cmd, opt_verbose)); - - /* TODO: should identify the error code from internal function execution */ - return CMD_EXEC_SUCCESS; -} - } /* end namespace openfpga */ diff --git a/openfpga/src/base/openfpga_lut_truth_table_fixup.h b/openfpga/src/base/openfpga_lut_truth_table_fixup.h index 3914fb3ca..d51bf240d 100644 --- a/openfpga/src/base/openfpga_lut_truth_table_fixup.h +++ b/openfpga/src/base/openfpga_lut_truth_table_fixup.h @@ -15,8 +15,9 @@ /* begin namespace openfpga */ namespace openfpga { -int lut_truth_table_fixup(OpenfpgaContext& openfpga_context, const Command& cmd, - const CommandContext& cmd_context); +void update_lut_tt_with_post_packing_results( + const AtomContext& atom_ctx, const ClusteringContext& clustering_ctx, + VprClusteringAnnotation& vpr_clustering_annotation, const bool& verbose); } /* end namespace openfpga */ diff --git a/openfpga/src/base/openfpga_lut_truth_table_fixup_template.h b/openfpga/src/base/openfpga_lut_truth_table_fixup_template.h new file mode 100644 index 000000000..10f4792bd --- /dev/null +++ b/openfpga/src/base/openfpga_lut_truth_table_fixup_template.h @@ -0,0 +1,53 @@ +#ifndef OPENFPGA_LUT_TRUTH_TABLE_FIXUP_TEMPLATE_H +#define OPENFPGA_LUT_TRUTH_TABLE_FIXUP_TEMPLATE_H + +/******************************************************************** + * Include header files that are required by function declaration + *******************************************************************/ +#include "vtr_time.h" +#include "command.h" +#include "command_context.h" +#include "openfpga_context.h" +#include "command_exit_codes.h" +#include "openfpga_lut_truth_table_fixup.h" + +/******************************************************************** + * Function declaration + *******************************************************************/ + +/* begin namespace openfpga */ +namespace openfpga { + +/******************************************************************** + * Top-level function to fix up the lut truth table results after packing is + *done The problem comes from a mismatch between the packing results and + * original truth tables in users' BLIF file + * As LUT inputs are equivalent in nature, the router of packer will try + * to swap the net mapping among these pins so as to achieve best + * routing optimization. + * However, it will cause the original truth table out-of-date when packing is + *done. This function aims to fix the mess after packing so that the truth table + * can be synchronized + *******************************************************************/ +template +int lut_truth_table_fixup_template(T& openfpga_context, const Command& cmd, + const CommandContext& cmd_context) { + vtr::ScopedStartFinishTimer timer( + "Fix up LUT truth tables after packing optimization"); + + CommandOptionId opt_verbose = cmd.option("verbose"); + + /* Apply fix-up to each packed block */ + update_lut_tt_with_post_packing_results( + g_vpr_ctx.atom(), g_vpr_ctx.clustering(), + openfpga_context.mutable_vpr_clustering_annotation(), + cmd_context.option_enable(cmd, opt_verbose)); + + /* TODO: should identify the error code from internal function execution */ + return CMD_EXEC_SUCCESS; +} + + +} /* end namespace openfpga */ + +#endif diff --git a/openfpga/src/base/openfpga_pb_pin_fixup.cpp b/openfpga/src/base/openfpga_pb_pin_fixup.cpp index 6bc693eeb..0e55f8f9d 100644 --- a/openfpga/src/base/openfpga_pb_pin_fixup.cpp +++ b/openfpga/src/base/openfpga_pb_pin_fixup.cpp @@ -20,9 +20,6 @@ #include "openfpga_side_manager.h" #include "pb_type_utils.h" -/* Include global variables of VPR */ -#include "globals.h" - /* begin namespace openfpga */ namespace openfpga { @@ -185,7 +182,7 @@ static void update_cluster_pin_with_post_routing_results( * Main function to fix up the pb pin mapping results * This function will walk through each grid *******************************************************************/ -static void update_pb_pin_with_post_routing_results( +void update_pb_pin_with_post_routing_results( const DeviceContext& device_ctx, const ClusteringContext& clustering_ctx, const PlacementContext& placement_ctx, const VprRoutingAnnotation& vpr_routing_annotation, @@ -247,33 +244,4 @@ static void update_pb_pin_with_post_routing_results( } } -/******************************************************************** - * Top-level function to fix up the pb pin mapping results - * The problem comes from a mismatch between the packing and routing results - * When there are equivalent input/output for any grids, router will try - * to swap the net mapping among these pins so as to achieve best - * routing optimization. - * However, it will cause the packing results out-of-date as the net mapping - * of each grid remain untouched once packing is done. - * This function aims to fix the mess after routing so that the net mapping - * can be synchronized - *******************************************************************/ -int pb_pin_fixup(OpenfpgaContext& openfpga_context, const Command& cmd, - const CommandContext& cmd_context) { - vtr::ScopedStartFinishTimer timer( - "Fix up pb pin mapping results after routing optimization"); - - CommandOptionId opt_verbose = cmd.option("verbose"); - - /* Apply fix-up to each grid */ - update_pb_pin_with_post_routing_results( - g_vpr_ctx.device(), g_vpr_ctx.clustering(), g_vpr_ctx.placement(), - openfpga_context.vpr_routing_annotation(), - openfpga_context.mutable_vpr_clustering_annotation(), - cmd_context.option_enable(cmd, opt_verbose)); - - /* TODO: should identify the error code from internal function execution */ - return CMD_EXEC_SUCCESS; -} - } /* end namespace openfpga */ diff --git a/openfpga/src/base/openfpga_pb_pin_fixup.h b/openfpga/src/base/openfpga_pb_pin_fixup.h index e7141ebdc..6afaa43d1 100644 --- a/openfpga/src/base/openfpga_pb_pin_fixup.h +++ b/openfpga/src/base/openfpga_pb_pin_fixup.h @@ -4,9 +4,8 @@ /******************************************************************** * Include header files that are required by function declaration *******************************************************************/ -#include "command.h" -#include "command_context.h" #include "openfpga_context.h" +#include "vpr_context.h" /******************************************************************** * Function declaration @@ -15,8 +14,11 @@ /* begin namespace openfpga */ namespace openfpga { -int pb_pin_fixup(OpenfpgaContext& openfpga_context, const Command& cmd, - const CommandContext& cmd_context); +void update_pb_pin_with_post_routing_results( + const DeviceContext& device_ctx, const ClusteringContext& clustering_ctx, + const PlacementContext& placement_ctx, + const VprRoutingAnnotation& vpr_routing_annotation, + VprClusteringAnnotation& vpr_clustering_annotation, const bool& verbose); } /* end namespace openfpga */ diff --git a/openfpga/src/base/openfpga_pb_pin_fixup_template.h b/openfpga/src/base/openfpga_pb_pin_fixup_template.h new file mode 100644 index 000000000..04902994b --- /dev/null +++ b/openfpga/src/base/openfpga_pb_pin_fixup_template.h @@ -0,0 +1,54 @@ +#ifndef OPENFPGA_PB_PIN_FIXUP_TEMPLATE_H +#define OPENFPGA_PB_PIN_FIXUP_TEMPLATE_H + +/******************************************************************** + * Include header files that are required by function declaration + *******************************************************************/ +#include "vtr_time.h" +#include "command_exit_codes.h" +#include "command.h" +#include "command_context.h" +#include "openfpga_pb_pin_fixup.h" +#include "globals.h" + +/******************************************************************** + * Function declaration + *******************************************************************/ + +/* begin namespace openfpga */ +namespace openfpga { + +/******************************************************************** + * Top-level function to fix up the pb pin mapping results + * The problem comes from a mismatch between the packing and routing results + * When there are equivalent input/output for any grids, router will try + * to swap the net mapping among these pins so as to achieve best + * routing optimization. + * However, it will cause the packing results out-of-date as the net mapping + * of each grid remain untouched once packing is done. + * This function aims to fix the mess after routing so that the net mapping + * can be synchronized + *******************************************************************/ +template +int pb_pin_fixup_template(T& openfpga_context, const Command& cmd, + const CommandContext& cmd_context) { + vtr::ScopedStartFinishTimer timer( + "Fix up pb pin mapping results after routing optimization"); + + CommandOptionId opt_verbose = cmd.option("verbose"); + + /* Apply fix-up to each grid */ + update_pb_pin_with_post_routing_results( + g_vpr_ctx.device(), g_vpr_ctx.clustering(), g_vpr_ctx.placement(), + openfpga_context.vpr_routing_annotation(), + openfpga_context.mutable_vpr_clustering_annotation(), + cmd_context.option_enable(cmd, opt_verbose)); + + /* TODO: should identify the error code from internal function execution */ + return CMD_EXEC_SUCCESS; +} + + +} /* end namespace openfpga */ + +#endif diff --git a/openfpga/src/base/openfpga_pcf2place.h b/openfpga/src/base/openfpga_pcf2place.h deleted file mode 100644 index 7b8eb1a62..000000000 --- a/openfpga/src/base/openfpga_pcf2place.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef OPENFPGA_PCF2PLACE_H -#define OPENFPGA_PCF2PLACE_H - -/******************************************************************** - * Include header files that are required by function declaration - *******************************************************************/ -#include "command.h" -#include "command_context.h" -#include "openfpga_context.h" - -/******************************************************************** - * Function declaration - *******************************************************************/ - -/* begin namespace openfpga */ -namespace openfpga { - -int pcf2place_wrapper(const OpenfpgaContext& openfpga_context, - const Command& cmd, const CommandContext& cmd_context); - -} /* end namespace openfpga */ - -#endif diff --git a/openfpga/src/base/openfpga_pcf2place.cpp b/openfpga/src/base/openfpga_pcf2place_template.h similarity index 94% rename from openfpga/src/base/openfpga_pcf2place.cpp rename to openfpga/src/base/openfpga_pcf2place_template.h index c3b70e85c..84d6e891f 100644 --- a/openfpga/src/base/openfpga_pcf2place.cpp +++ b/openfpga/src/base/openfpga_pcf2place_template.h @@ -1,20 +1,16 @@ +#ifndef OPENFPGA_PCF2PLACE_TEMPLATE_H +#define OPENFPGA_PCF2PLACE_TEMPLATE_H /******************************************************************** * This file includes functions to build bitstream database *******************************************************************/ -/* Headers from vtrutil library */ #include "vtr_log.h" #include "vtr_time.h" - -/* Headers from openfpgashell library */ #include "command_exit_codes.h" - -/* Headers from openfpgautil library */ +#include "command.h" +#include "command_context.h" #include "openfpga_digest.h" - -/* Headers from pcf library */ #include "blif_head_reader.h" #include "io_net_place.h" -#include "openfpga_pcf2place.h" #include "pcf2place.h" #include "pcf_reader.h" #include "read_csv_io_pin_table.h" @@ -27,7 +23,8 @@ namespace openfpga { * Top-level function to convert a .pcf file to a .place file which * which VPR can force I/O placement *******************************************************************/ -int pcf2place_wrapper(const OpenfpgaContext& openfpga_context, +template +int pcf2place_wrapper_template(const T& openfpga_context, const Command& cmd, const CommandContext& cmd_context) { /* todo: create a factory to produce this in the future*/ CommandOptionId opt_pcf = cmd.option("pcf"); @@ -118,3 +115,5 @@ int pcf2place_wrapper(const OpenfpgaContext& openfpga_context, } } /* end namespace openfpga */ + +#endif diff --git a/openfpga/src/base/openfpga_read_arch.h b/openfpga/src/base/openfpga_read_arch.h deleted file mode 100644 index 1d1e8d230..000000000 --- a/openfpga/src/base/openfpga_read_arch.h +++ /dev/null @@ -1,42 +0,0 @@ -#ifndef OPENFPGA_READ_ARCH_COMMAND_H -#define OPENFPGA_READ_ARCH_COMMAND_H - -/******************************************************************** - * Include header files that are required by function declaration - *******************************************************************/ -#include "command.h" -#include "command_context.h" -#include "openfpga_context.h" - -/******************************************************************** - * Function declaration - *******************************************************************/ - -/* begin namespace openfpga */ -namespace openfpga { - -int read_arch(OpenfpgaContext& openfpga_context, const Command& cmd, - const CommandContext& cmd_context); - -int write_arch(const OpenfpgaContext& openfpga_context, const Command& cmd, - const CommandContext& cmd_context); - -int read_simulation_setting(OpenfpgaContext& openfpga_context, - const Command& cmd, - const CommandContext& cmd_context); - -int write_simulation_setting(const OpenfpgaContext& openfpga_context, - const Command& cmd, - const CommandContext& cmd_context); - -int read_bitstream_setting(OpenfpgaContext& openfpga_context, - const Command& cmd, - const CommandContext& cmd_context); - -int write_bitstream_setting(const OpenfpgaContext& openfpga_context, - const Command& cmd, - const CommandContext& cmd_context); - -} /* end namespace openfpga */ - -#endif diff --git a/openfpga/src/base/openfpga_read_arch.cpp b/openfpga/src/base/openfpga_read_arch_template.h similarity index 92% rename from openfpga/src/base/openfpga_read_arch.cpp rename to openfpga/src/base/openfpga_read_arch_template.h index 9c7f41a3e..827301dc9 100644 --- a/openfpga/src/base/openfpga_read_arch.cpp +++ b/openfpga/src/base/openfpga_read_arch_template.h @@ -1,22 +1,18 @@ +#ifndef OPENFPGA_READ_ARCH_TEMPLATE_H +#define OPENFPGA_READ_ARCH_TEMPLATE_H /******************************************************************** * This file includes functions to read an OpenFPGA architecture file * which are built on the libarchopenfpga library *******************************************************************/ -/* Headers from vtrutil library */ #include "vtr_log.h" - -/* Headers from openfpgashell library */ #include "command_exit_codes.h" - -/* Headers from archopenfpga library */ #include "check_circuit_library.h" #include "check_tile_annotation.h" #include "circuit_library_utils.h" -#include "openfpga_read_arch.h" #include "read_xml_openfpga_arch.h" #include "write_xml_openfpga_arch.h" - -/* Include global variables of VPR */ +#include "command.h" +#include "command_context.h" #include "globals.h" /* begin namespace openfpga */ @@ -29,7 +25,8 @@ namespace openfpga { * The command will accept an option '--file' which is the architecture * file provided by users *******************************************************************/ -int read_arch(OpenfpgaContext& openfpga_context, const Command& cmd, +template +int read_openfpga_arch_template(T& openfpga_context, const Command& cmd, const CommandContext& cmd_context) { /* Check the option '--file' is enabled or not * Actually, it must be enabled as the shell interface will check @@ -77,7 +74,8 @@ int read_arch(OpenfpgaContext& openfpga_context, const Command& cmd, * The command will accept an option '--file' which is the architecture * file provided by users *******************************************************************/ -int write_arch(const OpenfpgaContext& openfpga_context, const Command& cmd, +template +int write_openfpga_arch_template(const T& openfpga_context, const Command& cmd, const CommandContext& cmd_context) { /* Check the option '--file' is enabled or not * Actually, it must be enabled as the shell interface will check @@ -103,7 +101,8 @@ int write_arch(const OpenfpgaContext& openfpga_context, const Command& cmd, * The command will accept an option '--file' which is the simulation setting * file provided by users *******************************************************************/ -int read_simulation_setting(OpenfpgaContext& openfpga_context, +template +int read_simulation_setting_template(T& openfpga_context, const Command& cmd, const CommandContext& cmd_context) { /* Check the option '--file' is enabled or not @@ -131,7 +130,8 @@ int read_simulation_setting(OpenfpgaContext& openfpga_context, * The command will accept an option '--file' which is the simulation setting * file provided by users *******************************************************************/ -int write_simulation_setting(const OpenfpgaContext& openfpga_context, +template +int write_simulation_setting_template(const T& openfpga_context, const Command& cmd, const CommandContext& cmd_context) { /* Check the option '--file' is enabled or not @@ -160,7 +160,8 @@ int write_simulation_setting(const OpenfpgaContext& openfpga_context, * The command will accept an option '--file' which is the bitstream setting * file provided by users *******************************************************************/ -int read_bitstream_setting(OpenfpgaContext& openfpga_context, +template +int read_bitstream_setting_template(T& openfpga_context, const Command& cmd, const CommandContext& cmd_context) { /* Check the option '--file' is enabled or not @@ -188,7 +189,8 @@ int read_bitstream_setting(OpenfpgaContext& openfpga_context, * The command will accept an option '--file' which is the simulation setting * file provided by users *******************************************************************/ -int write_bitstream_setting(const OpenfpgaContext& openfpga_context, +template +int write_bitstream_setting_template(const T& openfpga_context, const Command& cmd, const CommandContext& cmd_context) { /* Check the option '--file' is enabled or not @@ -210,3 +212,5 @@ int write_bitstream_setting(const OpenfpgaContext& openfpga_context, } } /* end namespace openfpga */ + +#endif diff --git a/openfpga/src/base/openfpga_setup_command.cpp b/openfpga/src/base/openfpga_setup_command.cpp index 08e9c7497..6eae8640c 100644 --- a/openfpga/src/base/openfpga_setup_command.cpp +++ b/openfpga/src/base/openfpga_setup_command.cpp @@ -4,700 +4,13 @@ * - read_openfpga_arch : read OpenFPGA architecture file *******************************************************************/ #include "openfpga_setup_command.h" - -#include "check_netlist_naming_conflict.h" -#include "openfpga_build_fabric.h" -#include "openfpga_link_arch.h" -#include "openfpga_lut_truth_table_fixup.h" -#include "openfpga_pb_pin_fixup.h" -#include "openfpga_pcf2place.h" -#include "openfpga_read_arch.h" -#include "openfpga_write_gsb.h" +#include "openfpga_setup_command_template.h" /* begin namespace openfpga */ namespace openfpga { -/******************************************************************** - * - Add a command to Shell environment: read_openfpga_arch - * - Add associated options - * - Add command dependency - *******************************************************************/ -static ShellCommandId add_openfpga_read_arch_command( - openfpga::Shell& shell, - const ShellCommandClassId& cmd_class_id) { - Command shell_cmd("read_openfpga_arch"); - - /* Add an option '--file' in short '-f'*/ - CommandOptionId opt_arch_file = - shell_cmd.add_option("file", true, "file path to the architecture XML"); - shell_cmd.set_option_short_name(opt_arch_file, "f"); - shell_cmd.set_option_require_value(opt_arch_file, openfpga::OPT_STRING); - - /* Add command 'read_openfpga_arch' to the Shell */ - ShellCommandId shell_cmd_id = - shell.add_command(shell_cmd, "read OpenFPGA architecture file"); - shell.set_command_class(shell_cmd_id, cmd_class_id); - shell.set_command_execute_function(shell_cmd_id, read_arch); - - return shell_cmd_id; -} - -/******************************************************************** - * - Add a command to Shell environment: write_openfpga_arch - * - Add associated options - * - Add command dependency - *******************************************************************/ -static ShellCommandId add_openfpga_write_arch_command( - openfpga::Shell& shell, - const ShellCommandClassId& cmd_class_id, - const std::vector& dependent_cmds) { - Command shell_cmd("write_openfpga_arch"); - /* Add an option '--file' in short '-f'*/ - CommandOptionId opt_file = - shell_cmd.add_option("file", true, "file path to the architecture XML"); - shell_cmd.set_option_short_name(opt_file, "f"); - shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING); - - /* Add command 'write_openfpga_arch' to the Shell */ - ShellCommandId shell_cmd_id = - shell.add_command(shell_cmd, "write OpenFPGA architecture file"); - shell.set_command_class(shell_cmd_id, cmd_class_id); - shell.set_command_const_execute_function(shell_cmd_id, write_arch); - - /* Add command dependency to the Shell */ - shell.set_command_dependency(shell_cmd_id, dependent_cmds); - - return shell_cmd_id; -} - -/******************************************************************** - * - Add a command to Shell environment: read_openfpga_simulation_setting - * - Add associated options - * - Add command dependency - *******************************************************************/ -static ShellCommandId add_openfpga_read_simulation_setting_command( - openfpga::Shell& shell, - const ShellCommandClassId& cmd_class_id) { - Command shell_cmd("read_openfpga_simulation_setting"); - - /* Add an option '--file' in short '-f'*/ - CommandOptionId opt_file = shell_cmd.add_option( - "file", true, "file path to the simulation setting XML"); - shell_cmd.set_option_short_name(opt_file, "f"); - shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING); - - /* Add command 'read_openfpga_arch' to the Shell */ - ShellCommandId shell_cmd_id = - shell.add_command(shell_cmd, "read OpenFPGA simulation setting file"); - shell.set_command_class(shell_cmd_id, cmd_class_id); - shell.set_command_execute_function(shell_cmd_id, read_simulation_setting); - - return shell_cmd_id; -} - -/******************************************************************** - * - Add a command to Shell environment: write_openfpga_simulation_setting - * - Add associated options - * - Add command dependency - *******************************************************************/ -static ShellCommandId add_openfpga_write_simulation_setting_command( - openfpga::Shell& shell, - const ShellCommandClassId& cmd_class_id, - const std::vector& dependent_cmds) { - Command shell_cmd("write_openfpga_simulation_setting"); - /* Add an option '--file' in short '-f'*/ - CommandOptionId opt_file = shell_cmd.add_option( - "file", true, "file path to the simulation setting XML"); - shell_cmd.set_option_short_name(opt_file, "f"); - shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING); - - /* Add command 'write_openfpga_arch' to the Shell */ - ShellCommandId shell_cmd_id = - shell.add_command(shell_cmd, "write OpenFPGA simulation setting file"); - shell.set_command_class(shell_cmd_id, cmd_class_id); - shell.set_command_const_execute_function(shell_cmd_id, - write_simulation_setting); - - /* Add command dependency to the Shell */ - shell.set_command_dependency(shell_cmd_id, dependent_cmds); - - return shell_cmd_id; -} - -/******************************************************************** - * - Add a command to Shell environment: read_openfpga_bitstream_setting - * - Add associated options - * - Add command dependency - *******************************************************************/ -static ShellCommandId add_openfpga_read_bitstream_setting_command( - openfpga::Shell& shell, - const ShellCommandClassId& cmd_class_id) { - Command shell_cmd("read_openfpga_bitstream_setting"); - - /* Add an option '--file' in short '-f'*/ - CommandOptionId opt_file = shell_cmd.add_option( - "file", true, "file path to the bitstream setting XML"); - shell_cmd.set_option_short_name(opt_file, "f"); - shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING); - - /* Add command 'read_openfpga_bitstream_setting' to the Shell */ - ShellCommandId shell_cmd_id = - shell.add_command(shell_cmd, "read OpenFPGA bitstream setting file"); - shell.set_command_class(shell_cmd_id, cmd_class_id); - shell.set_command_execute_function(shell_cmd_id, read_bitstream_setting); - - return shell_cmd_id; -} - -/******************************************************************** - * - Add a command to Shell environment: write_openfpga_bitstream_setting - * - Add associated options - * - Add command dependency - *******************************************************************/ -static ShellCommandId add_openfpga_write_bitstream_setting_command( - openfpga::Shell& shell, - const ShellCommandClassId& cmd_class_id, - const std::vector& dependent_cmds) { - Command shell_cmd("write_openfpga_bitstream_setting"); - /* Add an option '--file' in short '-f'*/ - CommandOptionId opt_file = shell_cmd.add_option( - "file", true, "file path to the bitstream setting XML"); - shell_cmd.set_option_short_name(opt_file, "f"); - shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING); - - /* Add command 'write_openfpga_bitstream_setting' to the Shell */ - ShellCommandId shell_cmd_id = - shell.add_command(shell_cmd, "write OpenFPGA bitstream setting file"); - shell.set_command_class(shell_cmd_id, cmd_class_id); - shell.set_command_const_execute_function(shell_cmd_id, - write_bitstream_setting); - - /* Add command dependency to the Shell */ - shell.set_command_dependency(shell_cmd_id, dependent_cmds); - - return shell_cmd_id; -} - -/******************************************************************** - * - Add a command to Shell environment: link_openfpga_arch - * - Add associated options - * - Add command dependency - *******************************************************************/ -static ShellCommandId add_openfpga_link_arch_command( - openfpga::Shell& shell, - const ShellCommandClassId& cmd_class_id, - const std::vector& dependent_cmds) { - Command shell_cmd("link_openfpga_arch"); - - /* Add an option '--activity_file'*/ - CommandOptionId opt_act_file = shell_cmd.add_option( - "activity_file", false, "file path to the signal activity"); - shell_cmd.set_option_require_value(opt_act_file, openfpga::OPT_STRING); - - /* Add an option '--sort_gsb_chan_node_in_edges'*/ - shell_cmd.add_option("sort_gsb_chan_node_in_edges", false, - "Sort all the incoming edges for each routing track " - "output node in General Switch Blocks (GSBs)"); - - /* Add an option '--verbose' */ - shell_cmd.add_option("verbose", false, "Show verbose outputs"); - - /* Add command 'link_openfpga_arch' to the Shell */ - ShellCommandId shell_cmd_id = - shell.add_command(shell_cmd, "Bind OpenFPGA architecture to VPR"); - shell.set_command_class(shell_cmd_id, cmd_class_id); - shell.set_command_execute_function(shell_cmd_id, link_arch); - - /* Add command dependency to the Shell */ - shell.set_command_dependency(shell_cmd_id, dependent_cmds); - - return shell_cmd_id; -} - -/******************************************************************** - * - Add a command to Shell environment: write_gsb_to_xml - * - Add associated options - * - Add command dependency - *******************************************************************/ -static ShellCommandId add_openfpga_write_gsb_command( - openfpga::Shell& shell, - const ShellCommandClassId& cmd_class_id, - const std::vector& dependent_cmds) { - Command shell_cmd("write_gsb_to_xml"); - /* Add an option '--file' in short '-f'*/ - CommandOptionId opt_file = shell_cmd.add_option( - "file", true, "path to the directory that stores the XML files"); - shell_cmd.set_option_short_name(opt_file, "f"); - shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING); - - /* Add an option '--unique' */ - shell_cmd.add_option("unique", false, "Only output unique GSB blocks"); - - /* Add an option '--exclude_rr_info' */ - shell_cmd.add_option("exclude_rr_info", false, - "Exclude routing resource graph information from output " - "files, e.g., node id as well as other attributes. This " - "is useful to check the connection inside GSBs purely."); - - /* Add an option '--exclude'*/ - CommandOptionId opt_exclude = - shell_cmd.add_option("exclude", false, - "Exclude part of the GSB data to be outputted. Can be " - "[``sb``|``cbx``|``cby``]. Users can exclude multiple " - "parts by using a splitter ``,``"); - shell_cmd.set_option_require_value(opt_exclude, openfpga::OPT_STRING); - - /* Add an option '--gsb_names'*/ - CommandOptionId opt_gsb_names = - shell_cmd.add_option("gsb_names", false, - "Specify the name of GSB to be outputted. Users can " - "specify multiple GSBs by using a splitter ``,``"); - shell_cmd.set_option_require_value(opt_gsb_names, openfpga::OPT_STRING); - - /* Add an option '--verbose' */ - shell_cmd.add_option("verbose", false, "Show verbose outputs"); - - /* Add command 'write_openfpga_arch' to the Shell */ - ShellCommandId shell_cmd_id = shell.add_command( - shell_cmd, - "write internal structures of General Switch Blocks to XML file"); - shell.set_command_class(shell_cmd_id, cmd_class_id); - shell.set_command_const_execute_function(shell_cmd_id, write_gsb); - - /* Add command dependency to the Shell */ - shell.set_command_dependency(shell_cmd_id, dependent_cmds); - - return shell_cmd_id; -} - -/******************************************************************** - * - Add a command to Shell environment: check_netlist_naming_conflict - * - Add associated options - * - Add command dependency - *******************************************************************/ -static ShellCommandId add_openfpga_check_netlist_naming_conflict_command( - openfpga::Shell& shell, - const ShellCommandClassId& cmd_class_id, - const std::vector& dependent_cmds) { - Command shell_cmd("check_netlist_naming_conflict"); - - /* Add an option '--fix' */ - shell_cmd.add_option("fix", false, "Apply correction to any conflicts found"); - - /* Add an option '--report' */ - CommandOptionId opt_rpt = shell_cmd.add_option( - "report", false, "Output a report file about what any correction applied"); - shell_cmd.set_option_require_value(opt_rpt, openfpga::OPT_STRING); - - /* Add command 'check_netlist_naming_conflict' to the Shell */ - ShellCommandId shell_cmd_id = - shell.add_command(shell_cmd, - "Check any block/net naming in users' BLIF netlist " - "violates the syntax of fabric generator"); - shell.set_command_class(shell_cmd_id, cmd_class_id); - shell.set_command_execute_function(shell_cmd_id, - check_netlist_naming_conflict); - - /* Add command dependency to the Shell */ - shell.set_command_dependency(shell_cmd_id, dependent_cmds); - - return shell_cmd_id; -} - -/******************************************************************** - * - Add a command to Shell environment: pb_pin_fixup - * - Add associated options - * - Add command dependency - *******************************************************************/ -static ShellCommandId add_openfpga_pb_pin_fixup_command( - openfpga::Shell& shell, - const ShellCommandClassId& cmd_class_id, - const std::vector& dependent_cmds) { - Command shell_cmd("pb_pin_fixup"); - - /* Add an option '--verbose' */ - shell_cmd.add_option("verbose", false, "Show verbose outputs"); - - /* Add command 'pb_pin_fixup' to the Shell */ - ShellCommandId shell_cmd_id = shell.add_command( - shell_cmd, - "Fix up the packing results due to pin swapping during routing stage"); - shell.set_command_class(shell_cmd_id, cmd_class_id); - shell.set_command_execute_function(shell_cmd_id, pb_pin_fixup); - - /* Add command dependency to the Shell */ - shell.set_command_dependency(shell_cmd_id, dependent_cmds); - - return shell_cmd_id; -} - -/******************************************************************** - * - Add a command to Shell environment: lut_truth_table_fixup - * - Add associated options - * - Add command dependency - *******************************************************************/ -static ShellCommandId add_openfpga_lut_truth_table_fixup_command( - openfpga::Shell& shell, - const ShellCommandClassId& cmd_class_id, - const std::vector& dependent_cmds) { - Command shell_cmd("lut_truth_table_fixup"); - /* Add an option '--verbose' */ - shell_cmd.add_option("verbose", false, "Show verbose outputs"); - - /* Add command 'lut_truth_table_fixup' to the Shell */ - ShellCommandId shell_cmd_id = - shell.add_command(shell_cmd, - "Fix up the truth table of Look-Up Tables due to pin " - "swapping during packing stage"); - shell.set_command_class(shell_cmd_id, cmd_class_id); - shell.set_command_execute_function(shell_cmd_id, lut_truth_table_fixup); - - /* Add command dependency to the Shell */ - shell.set_command_dependency(shell_cmd_id, dependent_cmds); - - return shell_cmd_id; -} - -/******************************************************************** - * - Add a command to Shell environment: build_fabric - * - Add associated options - * - Add command dependency - *******************************************************************/ -static ShellCommandId add_openfpga_build_fabric_command( - openfpga::Shell& shell, - const ShellCommandClassId& cmd_class_id, - const std::vector& dependent_cmds) { - Command shell_cmd("build_fabric"); - - /* Add an option '--frame_view' */ - shell_cmd.add_option( - "frame_view", false, - "Build only frame view of the fabric (nets are skipped)"); - - /* Add an option '--compress_routing' */ - shell_cmd.add_option("compress_routing", false, - "Compress the number of unique routing modules by " - "identifying the unique GSBs"); - - /* Add an option '--duplicate_grid_pin' */ - shell_cmd.add_option("duplicate_grid_pin", false, - "Duplicate the pins on the same side of a grid"); - - /* Add an option '--load_fabric_key' */ - CommandOptionId opt_load_fkey = shell_cmd.add_option( - "load_fabric_key", false, "load the fabric key from the given file"); - shell_cmd.set_option_require_value(opt_load_fkey, openfpga::OPT_STRING); - - /* Add an option '--write_fabric_key' */ - CommandOptionId opt_write_fkey = shell_cmd.add_option( - "write_fabric_key", false, "output current fabric key to a file"); - shell_cmd.set_option_require_value(opt_write_fkey, openfpga::OPT_STRING); - - /* Add an option '--generate_random_fabric_key' */ - shell_cmd.add_option("generate_random_fabric_key", false, - "Create a random fabric key which will shuffle the " - "memory address for encryption purpose"); - - /* Add an option '--verbose' */ - shell_cmd.add_option("verbose", false, "Show verbose outputs"); - - /* Add command 'compact_routing_hierarchy' to the Shell */ - ShellCommandId shell_cmd_id = - shell.add_command(shell_cmd, "Build the FPGA fabric in a graph of modules"); - shell.set_command_class(shell_cmd_id, cmd_class_id); - shell.set_command_execute_function(shell_cmd_id, build_fabric); - - /* Add command dependency to the Shell */ - shell.set_command_dependency(shell_cmd_id, dependent_cmds); - - return shell_cmd_id; -} - -/******************************************************************** - * - Add a command to Shell environment: write_fabric_hierarchy - * - Add associated options - * - Add command dependency - *******************************************************************/ -static ShellCommandId add_openfpga_write_fabric_hierarchy_command( - openfpga::Shell& shell, - const ShellCommandClassId& cmd_class_id, - const std::vector& dependent_cmds) { - Command shell_cmd("write_fabric_hierarchy"); - - /* Add an option '--file' */ - CommandOptionId opt_file = shell_cmd.add_option( - "file", true, "Specify the file name to write the hierarchy to"); - shell_cmd.set_option_short_name(opt_file, "f"); - shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING); - - /* Add an option '--depth' */ - CommandOptionId opt_depth = shell_cmd.add_option( - "depth", false, - "Specify the depth of hierarchy to which the writer should stop"); - shell_cmd.set_option_require_value(opt_depth, openfpga::OPT_INT); - - /* Add an option '--verbose' */ - shell_cmd.add_option("verbose", false, "Show verbose outputs"); - - /* Add command 'write_fabric_hierarchy' to the Shell */ - ShellCommandId shell_cmd_id = shell.add_command( - shell_cmd, "Write the hierarchy of FPGA fabric graph to a plain-text file"); - shell.set_command_class(shell_cmd_id, cmd_class_id); - shell.set_command_const_execute_function(shell_cmd_id, - write_fabric_hierarchy); - - /* Add command dependency to the Shell */ - shell.set_command_dependency(shell_cmd_id, dependent_cmds); - - return shell_cmd_id; -} - -/******************************************************************** - * - Add a command to Shell environment: write_fabric_io_info - * - Add associated options - * - Add command dependency - *******************************************************************/ -static ShellCommandId add_openfpga_write_fabric_io_info_command( - openfpga::Shell& shell, - const ShellCommandClassId& cmd_class_id, - const std::vector& dependent_cmds) { - Command shell_cmd("write_fabric_io_info"); - - /* Add an option '--file' in short '-f'*/ - CommandOptionId opt_file = shell_cmd.add_option( - "file", true, "file path to output the I/O information"); - shell_cmd.set_option_short_name(opt_file, "f"); - shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING); - - /* Add an option '--no_time_stamp' */ - shell_cmd.add_option("no_time_stamp", false, - "Do not print time stamp in output files"); - - /* Add an option '--verbose' */ - shell_cmd.add_option("verbose", false, "Enable verbose output"); - - /* Add command the Shell */ - ShellCommandId shell_cmd_id = - shell.add_command(shell_cmd, - "Write the I/O information, e.g., locations and similar " - "attributes, to a file"); - shell.set_command_class(shell_cmd_id, cmd_class_id); - shell.set_command_execute_function(shell_cmd_id, write_fabric_io_info); - - /* Add command dependency to the Shell */ - shell.set_command_dependency(shell_cmd_id, dependent_cmds); - - return shell_cmd_id; -} - -/******************************************************************** - * - Add a command to Shell environment: pcf2place - * - Add associated options - * - Add command dependency - *******************************************************************/ -static ShellCommandId add_openfpga_pcf2place_command( - openfpga::Shell& shell, - const ShellCommandClassId& cmd_class_id) { - Command shell_cmd("pcf2place"); - - /* Add an option '--pcf'*/ - CommandOptionId opt_pcf_file = - shell_cmd.add_option("pcf", true, "file path to the user pin constraint"); - shell_cmd.set_option_require_value(opt_pcf_file, openfpga::OPT_STRING); - - /* Add an option '--blif'*/ - CommandOptionId opt_blif_file = shell_cmd.add_option( - "blif", true, "file path to the synthesized netlist (.blif)"); - shell_cmd.set_option_require_value(opt_blif_file, openfpga::OPT_STRING); - - /* Add an option '--fpga_io_map'*/ - CommandOptionId opt_fpga_io_map_file = shell_cmd.add_option( - "fpga_io_map", true, "file path to FPGA I/O location map (.xml)"); - shell_cmd.set_option_require_value(opt_fpga_io_map_file, - openfpga::OPT_STRING); - - /* Add an option '--pin_table'*/ - CommandOptionId opt_pin_table_file = shell_cmd.add_option( - "pin_table", true, "file path to the pin table (.csv)"); - shell_cmd.set_option_require_value(opt_pin_table_file, openfpga::OPT_STRING); - - /* Add an option '--fpga_fix_pins'*/ - CommandOptionId opt_fpga_fix_pins_file = shell_cmd.add_option( - "fpga_fix_pins", true, - "file path to the output fix-pin placement file (.place)"); - shell_cmd.set_option_require_value(opt_fpga_fix_pins_file, - openfpga::OPT_STRING); - - /* Add an option '--pin_table_direction_convention'*/ - CommandOptionId opt_pin_table_dir_convention = - shell_cmd.add_option("pin_table_direction_convention", false, - "the convention to follow when inferring pin " - "direction from the name of ports in pin table file"); - shell_cmd.set_option_require_value(opt_pin_table_dir_convention, - openfpga::OPT_STRING); - - /* Add an option '--no_time_stamp' */ - shell_cmd.add_option("no_time_stamp", false, - "Do not print time stamp in output files"); - - /* Add an option '--verbose' */ - shell_cmd.add_option("verbose", false, "Enable verbose output"); - - /* Add command to the Shell */ - ShellCommandId shell_cmd_id = shell.add_command( - shell_cmd, "Convert user Pin Constraint File (.pcf) to an placement file"); - shell.set_command_class(shell_cmd_id, cmd_class_id); - shell.set_command_execute_function(shell_cmd_id, pcf2place_wrapper); - - return shell_cmd_id; -} - void add_openfpga_setup_commands(openfpga::Shell& shell) { - /* Get the unique id of 'vpr' command which is to be used in creating the - * dependency graph */ - const ShellCommandId& vpr_cmd_id = shell.command(std::string("vpr")); - - /* Add a new class of commands */ - ShellCommandClassId openfpga_setup_cmd_class = - shell.add_command_class("OpenFPGA setup"); - - /******************************** - * Command 'pcf2place' - */ - add_openfpga_pcf2place_command(shell, openfpga_setup_cmd_class); - - /******************************** - * Command 'read_openfpga_arch' - */ - ShellCommandId read_arch_cmd_id = - add_openfpga_read_arch_command(shell, openfpga_setup_cmd_class); - - /******************************** - * Command 'write_openfpga_arch' - */ - /* The 'write_openfpga_arch' command should NOT be executed before - * 'read_openfpga_arch' */ - std::vector write_arch_dependent_cmds(1, read_arch_cmd_id); - add_openfpga_write_arch_command(shell, openfpga_setup_cmd_class, - write_arch_dependent_cmds); - - /******************************** - * Command 'read_openfpga_simulation_setting' - */ - ShellCommandId read_sim_setting_cmd_id = - add_openfpga_read_simulation_setting_command(shell, - openfpga_setup_cmd_class); - - /******************************** - * Command 'write_openfpga_simulation_setting' - */ - /* The 'write_openfpga_simulation_setting' command should NOT be executed - * before 'read_openfpga_simulation_setting' */ - std::vector write_sim_setting_dependent_cmds( - 1, read_sim_setting_cmd_id); - add_openfpga_write_simulation_setting_command( - shell, openfpga_setup_cmd_class, write_sim_setting_dependent_cmds); - - /******************************** - * Command 'read_openfpga_bitstream_setting' - */ - ShellCommandId read_bitstream_setting_cmd_id = - add_openfpga_read_bitstream_setting_command(shell, - openfpga_setup_cmd_class); - - /******************************** - * Command 'write_openfpga_bitstream_setting' - */ - /* The 'write_openfpga_bitstream_setting' command should NOT be executed - * before 'read_openfpga_bitstream_setting' */ - std::vector write_bitstream_setting_dependent_cmds( - 1, read_bitstream_setting_cmd_id); - add_openfpga_write_bitstream_setting_command( - shell, openfpga_setup_cmd_class, write_bitstream_setting_dependent_cmds); - - /******************************** - * Command 'link_openfpga_arch' - */ - /* The 'link_openfpga_arch' command should NOT be executed before 'vpr' */ - std::vector link_arch_dependent_cmds; - link_arch_dependent_cmds.push_back(read_arch_cmd_id); - /* TODO: This will be uncommented when openfpga flow script is updated - */ - link_arch_dependent_cmds.push_back(read_sim_setting_cmd_id); - link_arch_dependent_cmds.push_back(vpr_cmd_id); - ShellCommandId link_arch_cmd_id = add_openfpga_link_arch_command( - shell, openfpga_setup_cmd_class, link_arch_dependent_cmds); - - /******************************** - * Command 'write_gsb' - */ - /* The 'write_gsb' command should NOT be executed before 'link_openfpga_arch' - */ - std::vector write_gsb_dependent_cmds; - write_gsb_dependent_cmds.push_back(link_arch_cmd_id); - add_openfpga_write_gsb_command(shell, openfpga_setup_cmd_class, - write_gsb_dependent_cmds); - - /******************************************* - * Command 'check_netlist_naming_conflict' - */ - /* The 'check_netlist_naming_conflict' command should NOT be executed before - * 'vpr' */ - std::vector nlist_naming_dependent_cmds; - nlist_naming_dependent_cmds.push_back(vpr_cmd_id); - add_openfpga_check_netlist_naming_conflict_command( - shell, openfpga_setup_cmd_class, nlist_naming_dependent_cmds); - - /******************************** - * Command 'pb_pin_fixup' - */ - /* The 'pb_pin_fixup' command should NOT be executed before - * 'read_openfpga_arch' and 'vpr' */ - std::vector pb_pin_fixup_dependent_cmds; - pb_pin_fixup_dependent_cmds.push_back(read_arch_cmd_id); - pb_pin_fixup_dependent_cmds.push_back(vpr_cmd_id); - add_openfpga_pb_pin_fixup_command(shell, openfpga_setup_cmd_class, - pb_pin_fixup_dependent_cmds); - - /******************************** - * Command 'lut_truth_table_fixup' - */ - /* The 'lut_truth_table_fixup' command should NOT be executed before - * 'read_openfpga_arch' and 'vpr' */ - std::vector lut_tt_fixup_dependent_cmds; - lut_tt_fixup_dependent_cmds.push_back(read_arch_cmd_id); - lut_tt_fixup_dependent_cmds.push_back(vpr_cmd_id); - add_openfpga_lut_truth_table_fixup_command(shell, openfpga_setup_cmd_class, - lut_tt_fixup_dependent_cmds); - /******************************** - * Command 'build_fabric' - */ - /* The 'build_fabric' command should NOT be executed before - * 'link_openfpga_arch' */ - std::vector build_fabric_dependent_cmds; - build_fabric_dependent_cmds.push_back(link_arch_cmd_id); - ShellCommandId build_fabric_cmd_id = add_openfpga_build_fabric_command( - shell, openfpga_setup_cmd_class, build_fabric_dependent_cmds); - - /******************************** - * Command 'write_fabric_hierarchy' - */ - /* The 'write_fabric_hierarchy' command should NOT be executed before - * 'build_fabric' */ - std::vector write_fabric_hie_dependent_cmds; - write_fabric_hie_dependent_cmds.push_back(build_fabric_cmd_id); - add_openfpga_write_fabric_hierarchy_command(shell, openfpga_setup_cmd_class, - write_fabric_hie_dependent_cmds); - - /******************************** - * Command 'write_fabric_io_info' - */ - /* The 'write_fabric_io_info' command should NOT be executed before - * 'build_fabric' */ - std::vector cmd_dependency_write_fabric_io_info; - cmd_dependency_write_fabric_io_info.push_back(build_fabric_cmd_id); - add_openfpga_write_fabric_io_info_command( - shell, openfpga_setup_cmd_class, cmd_dependency_write_fabric_io_info); + add_setup_command_templates(shell); } } /* end namespace openfpga */ diff --git a/openfpga/src/base/openfpga_setup_command_template.h b/openfpga/src/base/openfpga_setup_command_template.h new file mode 100644 index 000000000..c90f4399d --- /dev/null +++ b/openfpga/src/base/openfpga_setup_command_template.h @@ -0,0 +1,722 @@ +#ifndef OPENFPGA_SETUP_COMMAND_TEMPLATE_H +#define OPENFPGA_SETUP_COMMAND_TEMPLATE_H +/******************************************************************** + * Add commands to the OpenFPGA shell interface, + * in purpose of setting up OpenFPGA core engine, including: + * - read_openfpga_arch : read OpenFPGA architecture file + *******************************************************************/ +#include "check_netlist_naming_conflict_template.h" +#include "openfpga_build_fabric_template.h" +#include "openfpga_link_arch_template.h" +#include "openfpga_lut_truth_table_fixup_template.h" +#include "openfpga_pb_pin_fixup_template.h" +#include "openfpga_pcf2place_template.h" +#include "openfpga_read_arch_template.h" +#include "openfpga_write_gsb_template.h" +#include "shell.h" + +/* begin namespace openfpga */ +namespace openfpga { + +/******************************************************************** + * - Add a command to Shell environment: read_openfpga_arch + * - Add associated options + * - Add command dependency + *******************************************************************/ +template +ShellCommandId add_read_openfpga_arch_command_template( + openfpga::Shell& shell, + const ShellCommandClassId& cmd_class_id) { + Command shell_cmd("read_openfpga_arch"); + + /* Add an option '--file' in short '-f'*/ + CommandOptionId opt_arch_file = + shell_cmd.add_option("file", true, "file path to the architecture XML"); + shell_cmd.set_option_short_name(opt_arch_file, "f"); + shell_cmd.set_option_require_value(opt_arch_file, openfpga::OPT_STRING); + + /* Add command 'read_openfpga_arch' to the Shell */ + ShellCommandId shell_cmd_id = + shell.add_command(shell_cmd, "read OpenFPGA architecture file"); + shell.set_command_class(shell_cmd_id, cmd_class_id); + shell.set_command_execute_function(shell_cmd_id, read_openfpga_arch_template); + + return shell_cmd_id; +} + +/******************************************************************** + * - Add a command to Shell environment: write_openfpga_arch + * - Add associated options + * - Add command dependency + *******************************************************************/ +template +ShellCommandId add_write_openfpga_arch_command_template( + openfpga::Shell& shell, + const ShellCommandClassId& cmd_class_id, + const std::vector& dependent_cmds) { + Command shell_cmd("write_openfpga_arch"); + /* Add an option '--file' in short '-f'*/ + CommandOptionId opt_file = + shell_cmd.add_option("file", true, "file path to the architecture XML"); + shell_cmd.set_option_short_name(opt_file, "f"); + shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING); + + /* Add command 'write_openfpga_arch' to the Shell */ + ShellCommandId shell_cmd_id = + shell.add_command(shell_cmd, "write OpenFPGA architecture file"); + shell.set_command_class(shell_cmd_id, cmd_class_id); + shell.set_command_const_execute_function(shell_cmd_id, write_openfpga_arch_template); + + /* Add command dependency to the Shell */ + shell.set_command_dependency(shell_cmd_id, dependent_cmds); + + return shell_cmd_id; +} + +/******************************************************************** + * - Add a command to Shell environment: read_openfpga_simulation_setting + * - Add associated options + * - Add command dependency + *******************************************************************/ +template +ShellCommandId add_read_simulation_setting_command_template( + openfpga::Shell& shell, + const ShellCommandClassId& cmd_class_id) { + Command shell_cmd("read_openfpga_simulation_setting"); + + /* Add an option '--file' in short '-f'*/ + CommandOptionId opt_file = shell_cmd.add_option( + "file", true, "file path to the simulation setting XML"); + shell_cmd.set_option_short_name(opt_file, "f"); + shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING); + + /* Add command 'read_openfpga_arch' to the Shell */ + ShellCommandId shell_cmd_id = + shell.add_command(shell_cmd, "read OpenFPGA simulation setting file"); + shell.set_command_class(shell_cmd_id, cmd_class_id); + shell.set_command_execute_function(shell_cmd_id, read_simulation_setting_template); + + return shell_cmd_id; +} + +/******************************************************************** + * - Add a command to Shell environment: write_openfpga_simulation_setting + * - Add associated options + * - Add command dependency + *******************************************************************/ +template +ShellCommandId add_write_simulation_setting_command_template( + openfpga::Shell& shell, + const ShellCommandClassId& cmd_class_id, + const std::vector& dependent_cmds) { + Command shell_cmd("write_openfpga_simulation_setting"); + /* Add an option '--file' in short '-f'*/ + CommandOptionId opt_file = shell_cmd.add_option( + "file", true, "file path to the simulation setting XML"); + shell_cmd.set_option_short_name(opt_file, "f"); + shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING); + + /* Add command 'write_openfpga_arch' to the Shell */ + ShellCommandId shell_cmd_id = + shell.add_command(shell_cmd, "write OpenFPGA simulation setting file"); + shell.set_command_class(shell_cmd_id, cmd_class_id); + shell.set_command_const_execute_function(shell_cmd_id, + write_simulation_setting_template); + + /* Add command dependency to the Shell */ + shell.set_command_dependency(shell_cmd_id, dependent_cmds); + + return shell_cmd_id; +} + +/******************************************************************** + * - Add a command to Shell environment: read_openfpga_bitstream_setting + * - Add associated options + * - Add command dependency + *******************************************************************/ +template +ShellCommandId add_read_bitstream_setting_command_template( + openfpga::Shell& shell, + const ShellCommandClassId& cmd_class_id) { + Command shell_cmd("read_openfpga_bitstream_setting"); + + /* Add an option '--file' in short '-f'*/ + CommandOptionId opt_file = shell_cmd.add_option( + "file", true, "file path to the bitstream setting XML"); + shell_cmd.set_option_short_name(opt_file, "f"); + shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING); + + /* Add command 'read_openfpga_bitstream_setting' to the Shell */ + ShellCommandId shell_cmd_id = + shell.add_command(shell_cmd, "read OpenFPGA bitstream setting file"); + shell.set_command_class(shell_cmd_id, cmd_class_id); + shell.set_command_execute_function(shell_cmd_id, read_bitstream_setting_template); + + return shell_cmd_id; +} + +/******************************************************************** + * - Add a command to Shell environment: write_openfpga_bitstream_setting + * - Add associated options + * - Add command dependency + *******************************************************************/ +template +ShellCommandId add_write_bitstream_setting_command_template( + openfpga::Shell& shell, + const ShellCommandClassId& cmd_class_id, + const std::vector& dependent_cmds) { + Command shell_cmd("write_openfpga_bitstream_setting"); + /* Add an option '--file' in short '-f'*/ + CommandOptionId opt_file = shell_cmd.add_option( + "file", true, "file path to the bitstream setting XML"); + shell_cmd.set_option_short_name(opt_file, "f"); + shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING); + + /* Add command 'write_openfpga_bitstream_setting' to the Shell */ + ShellCommandId shell_cmd_id = + shell.add_command(shell_cmd, "write OpenFPGA bitstream setting file"); + shell.set_command_class(shell_cmd_id, cmd_class_id); + shell.set_command_const_execute_function(shell_cmd_id, + write_bitstream_setting_template); + + /* Add command dependency to the Shell */ + shell.set_command_dependency(shell_cmd_id, dependent_cmds); + + return shell_cmd_id; +} + +/******************************************************************** + * - Add a command to Shell environment: link_openfpga_arch + * - Add associated options + * - Add command dependency + *******************************************************************/ +template +ShellCommandId add_link_arch_command_template( + openfpga::Shell& shell, + const ShellCommandClassId& cmd_class_id, + const std::vector& dependent_cmds) { + Command shell_cmd("link_openfpga_arch"); + + /* Add an option '--activity_file'*/ + CommandOptionId opt_act_file = shell_cmd.add_option( + "activity_file", false, "file path to the signal activity"); + shell_cmd.set_option_require_value(opt_act_file, openfpga::OPT_STRING); + + /* Add an option '--sort_gsb_chan_node_in_edges'*/ + shell_cmd.add_option("sort_gsb_chan_node_in_edges", false, + "Sort all the incoming edges for each routing track " + "output node in General Switch Blocks (GSBs)"); + + /* Add an option '--verbose' */ + shell_cmd.add_option("verbose", false, "Show verbose outputs"); + + /* Add command 'link_openfpga_arch' to the Shell */ + ShellCommandId shell_cmd_id = + shell.add_command(shell_cmd, "Bind OpenFPGA architecture to VPR"); + shell.set_command_class(shell_cmd_id, cmd_class_id); + shell.set_command_execute_function(shell_cmd_id, link_arch_template); + + /* Add command dependency to the Shell */ + shell.set_command_dependency(shell_cmd_id, dependent_cmds); + + return shell_cmd_id; +} + +/******************************************************************** + * - Add a command to Shell environment: write_gsb_to_xml + * - Add associated options + * - Add command dependency + *******************************************************************/ +template +ShellCommandId add_write_gsb_command_template( + openfpga::Shell& shell, + const ShellCommandClassId& cmd_class_id, + const std::vector& dependent_cmds) { + Command shell_cmd("write_gsb_to_xml"); + /* Add an option '--file' in short '-f'*/ + CommandOptionId opt_file = shell_cmd.add_option( + "file", true, "path to the directory that stores the XML files"); + shell_cmd.set_option_short_name(opt_file, "f"); + shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING); + + /* Add an option '--unique' */ + shell_cmd.add_option("unique", false, "Only output unique GSB blocks"); + + /* Add an option '--exclude_rr_info' */ + shell_cmd.add_option("exclude_rr_info", false, + "Exclude routing resource graph information from output " + "files, e.g., node id as well as other attributes. This " + "is useful to check the connection inside GSBs purely."); + + /* Add an option '--exclude'*/ + CommandOptionId opt_exclude = + shell_cmd.add_option("exclude", false, + "Exclude part of the GSB data to be outputted. Can be " + "[``sb``|``cbx``|``cby``]. Users can exclude multiple " + "parts by using a splitter ``,``"); + shell_cmd.set_option_require_value(opt_exclude, openfpga::OPT_STRING); + + /* Add an option '--gsb_names'*/ + CommandOptionId opt_gsb_names = + shell_cmd.add_option("gsb_names", false, + "Specify the name of GSB to be outputted. Users can " + "specify multiple GSBs by using a splitter ``,``"); + shell_cmd.set_option_require_value(opt_gsb_names, openfpga::OPT_STRING); + + /* Add an option '--verbose' */ + shell_cmd.add_option("verbose", false, "Show verbose outputs"); + + /* Add command 'write_openfpga_arch' to the Shell */ + ShellCommandId shell_cmd_id = shell.add_command( + shell_cmd, + "write internal structures of General Switch Blocks to XML file"); + shell.set_command_class(shell_cmd_id, cmd_class_id); + shell.set_command_const_execute_function(shell_cmd_id, write_gsb_template); + + /* Add command dependency to the Shell */ + shell.set_command_dependency(shell_cmd_id, dependent_cmds); + + return shell_cmd_id; +} + +/******************************************************************** + * - Add a command to Shell environment: check_netlist_naming_conflict + * - Add associated options + * - Add command dependency + *******************************************************************/ +template +ShellCommandId add_check_netlist_naming_conflict_command_template( + openfpga::Shell& shell, + const ShellCommandClassId& cmd_class_id, + const std::vector& dependent_cmds) { + Command shell_cmd("check_netlist_naming_conflict"); + + /* Add an option '--fix' */ + shell_cmd.add_option("fix", false, "Apply correction to any conflicts found"); + + /* Add an option '--report' */ + CommandOptionId opt_rpt = shell_cmd.add_option( + "report", false, "Output a report file about what any correction applied"); + shell_cmd.set_option_require_value(opt_rpt, openfpga::OPT_STRING); + + /* Add command 'check_netlist_naming_conflict' to the Shell */ + ShellCommandId shell_cmd_id = + shell.add_command(shell_cmd, + "Check any block/net naming in users' BLIF netlist " + "violates the syntax of fabric generator"); + shell.set_command_class(shell_cmd_id, cmd_class_id); + shell.set_command_execute_function(shell_cmd_id, + check_netlist_naming_conflict_template); + + /* Add command dependency to the Shell */ + shell.set_command_dependency(shell_cmd_id, dependent_cmds); + + return shell_cmd_id; +} + +/******************************************************************** + * - Add a command to Shell environment: pb_pin_fixup + * - Add associated options + * - Add command dependency + *******************************************************************/ +template +ShellCommandId add_pb_pin_fixup_command_template( + openfpga::Shell& shell, + const ShellCommandClassId& cmd_class_id, + const std::vector& dependent_cmds) { + Command shell_cmd("pb_pin_fixup"); + + /* Add an option '--verbose' */ + shell_cmd.add_option("verbose", false, "Show verbose outputs"); + + /* Add command 'pb_pin_fixup' to the Shell */ + ShellCommandId shell_cmd_id = shell.add_command( + shell_cmd, + "Fix up the packing results due to pin swapping during routing stage"); + shell.set_command_class(shell_cmd_id, cmd_class_id); + shell.set_command_execute_function(shell_cmd_id, pb_pin_fixup_template); + + /* Add command dependency to the Shell */ + shell.set_command_dependency(shell_cmd_id, dependent_cmds); + + return shell_cmd_id; +} + +/******************************************************************** + * - Add a command to Shell environment: lut_truth_table_fixup + * - Add associated options + * - Add command dependency + *******************************************************************/ +template +ShellCommandId add_lut_truth_table_fixup_command_template( + openfpga::Shell& shell, + const ShellCommandClassId& cmd_class_id, + const std::vector& dependent_cmds) { + Command shell_cmd("lut_truth_table_fixup"); + /* Add an option '--verbose' */ + shell_cmd.add_option("verbose", false, "Show verbose outputs"); + + /* Add command 'lut_truth_table_fixup' to the Shell */ + ShellCommandId shell_cmd_id = + shell.add_command(shell_cmd, + "Fix up the truth table of Look-Up Tables due to pin " + "swapping during packing stage"); + shell.set_command_class(shell_cmd_id, cmd_class_id); + shell.set_command_execute_function(shell_cmd_id, lut_truth_table_fixup_template); + + /* Add command dependency to the Shell */ + shell.set_command_dependency(shell_cmd_id, dependent_cmds); + + return shell_cmd_id; +} + +/******************************************************************** + * - Add a command to Shell environment: build_fabric + * - Add associated options + * - Add command dependency + *******************************************************************/ +template +ShellCommandId add_build_fabric_command_template( + openfpga::Shell& shell, + const ShellCommandClassId& cmd_class_id, + const std::vector& dependent_cmds) { + Command shell_cmd("build_fabric"); + + /* Add an option '--frame_view' */ + shell_cmd.add_option( + "frame_view", false, + "Build only frame view of the fabric (nets are skipped)"); + + /* Add an option '--compress_routing' */ + shell_cmd.add_option("compress_routing", false, + "Compress the number of unique routing modules by " + "identifying the unique GSBs"); + + /* Add an option '--duplicate_grid_pin' */ + shell_cmd.add_option("duplicate_grid_pin", false, + "Duplicate the pins on the same side of a grid"); + + /* Add an option '--load_fabric_key' */ + CommandOptionId opt_load_fkey = shell_cmd.add_option( + "load_fabric_key", false, "load the fabric key from the given file"); + shell_cmd.set_option_require_value(opt_load_fkey, openfpga::OPT_STRING); + + /* Add an option '--write_fabric_key' */ + CommandOptionId opt_write_fkey = shell_cmd.add_option( + "write_fabric_key", false, "output current fabric key to a file"); + shell_cmd.set_option_require_value(opt_write_fkey, openfpga::OPT_STRING); + + /* Add an option '--generate_random_fabric_key' */ + shell_cmd.add_option("generate_random_fabric_key", false, + "Create a random fabric key which will shuffle the " + "memory address for encryption purpose"); + + /* Add an option '--verbose' */ + shell_cmd.add_option("verbose", false, "Show verbose outputs"); + + /* Add command 'compact_routing_hierarchy' to the Shell */ + ShellCommandId shell_cmd_id = + shell.add_command(shell_cmd, "Build the FPGA fabric in a graph of modules"); + shell.set_command_class(shell_cmd_id, cmd_class_id); + shell.set_command_execute_function(shell_cmd_id, build_fabric_template); + + /* Add command dependency to the Shell */ + shell.set_command_dependency(shell_cmd_id, dependent_cmds); + + return shell_cmd_id; +} + +/******************************************************************** + * - Add a command to Shell environment: write_fabric_hierarchy + * - Add associated options + * - Add command dependency + *******************************************************************/ +template +ShellCommandId add_write_fabric_hierarchy_command_template( + openfpga::Shell& shell, + const ShellCommandClassId& cmd_class_id, + const std::vector& dependent_cmds) { + Command shell_cmd("write_fabric_hierarchy"); + + /* Add an option '--file' */ + CommandOptionId opt_file = shell_cmd.add_option( + "file", true, "Specify the file name to write the hierarchy to"); + shell_cmd.set_option_short_name(opt_file, "f"); + shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING); + + /* Add an option '--depth' */ + CommandOptionId opt_depth = shell_cmd.add_option( + "depth", false, + "Specify the depth of hierarchy to which the writer should stop"); + shell_cmd.set_option_require_value(opt_depth, openfpga::OPT_INT); + + /* Add an option '--verbose' */ + shell_cmd.add_option("verbose", false, "Show verbose outputs"); + + /* Add command 'write_fabric_hierarchy' to the Shell */ + ShellCommandId shell_cmd_id = shell.add_command( + shell_cmd, "Write the hierarchy of FPGA fabric graph to a plain-text file"); + shell.set_command_class(shell_cmd_id, cmd_class_id); + shell.set_command_const_execute_function(shell_cmd_id, + write_fabric_hierarchy_template); + + /* Add command dependency to the Shell */ + shell.set_command_dependency(shell_cmd_id, dependent_cmds); + + return shell_cmd_id; +} + +/******************************************************************** + * - Add a command to Shell environment: write_fabric_io_info + * - Add associated options + * - Add command dependency + *******************************************************************/ +template +ShellCommandId add_write_fabric_io_info_command_template( + openfpga::Shell& shell, + const ShellCommandClassId& cmd_class_id, + const std::vector& dependent_cmds) { + Command shell_cmd("write_fabric_io_info"); + + /* Add an option '--file' in short '-f'*/ + CommandOptionId opt_file = shell_cmd.add_option( + "file", true, "file path to output the I/O information"); + shell_cmd.set_option_short_name(opt_file, "f"); + shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING); + + /* Add an option '--no_time_stamp' */ + shell_cmd.add_option("no_time_stamp", false, + "Do not print time stamp in output files"); + + /* Add an option '--verbose' */ + shell_cmd.add_option("verbose", false, "Enable verbose output"); + + /* Add command the Shell */ + ShellCommandId shell_cmd_id = + shell.add_command(shell_cmd, + "Write the I/O information, e.g., locations and similar " + "attributes, to a file"); + shell.set_command_class(shell_cmd_id, cmd_class_id); + shell.set_command_execute_function(shell_cmd_id, write_fabric_io_info_template); + + /* Add command dependency to the Shell */ + shell.set_command_dependency(shell_cmd_id, dependent_cmds); + + return shell_cmd_id; +} + +/******************************************************************** + * - Add a command to Shell environment: pcf2place + * - Add associated options + * - Add command dependency + *******************************************************************/ +template +ShellCommandId add_pcf2place_command_template( + openfpga::Shell& shell, + const ShellCommandClassId& cmd_class_id) { + Command shell_cmd("pcf2place"); + + /* Add an option '--pcf'*/ + CommandOptionId opt_pcf_file = + shell_cmd.add_option("pcf", true, "file path to the user pin constraint"); + shell_cmd.set_option_require_value(opt_pcf_file, openfpga::OPT_STRING); + + /* Add an option '--blif'*/ + CommandOptionId opt_blif_file = shell_cmd.add_option( + "blif", true, "file path to the synthesized netlist (.blif)"); + shell_cmd.set_option_require_value(opt_blif_file, openfpga::OPT_STRING); + + /* Add an option '--fpga_io_map'*/ + CommandOptionId opt_fpga_io_map_file = shell_cmd.add_option( + "fpga_io_map", true, "file path to FPGA I/O location map (.xml)"); + shell_cmd.set_option_require_value(opt_fpga_io_map_file, + openfpga::OPT_STRING); + + /* Add an option '--pin_table'*/ + CommandOptionId opt_pin_table_file = shell_cmd.add_option( + "pin_table", true, "file path to the pin table (.csv)"); + shell_cmd.set_option_require_value(opt_pin_table_file, openfpga::OPT_STRING); + + /* Add an option '--fpga_fix_pins'*/ + CommandOptionId opt_fpga_fix_pins_file = shell_cmd.add_option( + "fpga_fix_pins", true, + "file path to the output fix-pin placement file (.place)"); + shell_cmd.set_option_require_value(opt_fpga_fix_pins_file, + openfpga::OPT_STRING); + + /* Add an option '--pin_table_direction_convention'*/ + CommandOptionId opt_pin_table_dir_convention = + shell_cmd.add_option("pin_table_direction_convention", false, + "the convention to follow when inferring pin " + "direction from the name of ports in pin table file"); + shell_cmd.set_option_require_value(opt_pin_table_dir_convention, + openfpga::OPT_STRING); + + /* Add an option '--no_time_stamp' */ + shell_cmd.add_option("no_time_stamp", false, + "Do not print time stamp in output files"); + + /* Add an option '--verbose' */ + shell_cmd.add_option("verbose", false, "Enable verbose output"); + + /* Add command to the Shell */ + ShellCommandId shell_cmd_id = shell.add_command( + shell_cmd, "Convert user Pin Constraint File (.pcf) to an placement file"); + shell.set_command_class(shell_cmd_id, cmd_class_id); + shell.set_command_execute_function(shell_cmd_id, pcf2place_wrapper_template); + + return shell_cmd_id; +} + +template +void add_setup_command_templates(openfpga::Shell& shell) { + /* Get the unique id of 'vpr' command which is to be used in creating the + * dependency graph */ + const ShellCommandId& vpr_cmd_id = shell.command(std::string("vpr")); + + /* Add a new class of commands */ + ShellCommandClassId openfpga_setup_cmd_class = + shell.add_command_class("OpenFPGA setup"); + + /******************************** + * Command 'pcf2place' + */ + add_pcf2place_command_template(shell, openfpga_setup_cmd_class); + + /******************************** + * Command 'read_openfpga_arch' + */ + ShellCommandId read_arch_cmd_id = + add_read_openfpga_arch_command_template(shell, openfpga_setup_cmd_class); + + /******************************** + * Command 'write_openfpga_arch' + */ + /* The 'write_openfpga_arch' command should NOT be executed before + * 'read_openfpga_arch' */ + std::vector write_arch_dependent_cmds(1, read_arch_cmd_id); + add_write_openfpga_arch_command_template(shell, openfpga_setup_cmd_class, + write_arch_dependent_cmds); + + /******************************** + * Command 'read_openfpga_simulation_setting' + */ + ShellCommandId read_sim_setting_cmd_id = + add_read_simulation_setting_command_template(shell, + openfpga_setup_cmd_class); + + /******************************** + * Command 'write_openfpga_simulation_setting' + */ + /* The 'write_openfpga_simulation_setting' command should NOT be executed + * before 'read_openfpga_simulation_setting' */ + std::vector write_sim_setting_dependent_cmds( + 1, read_sim_setting_cmd_id); + add_write_simulation_setting_command_template( + shell, openfpga_setup_cmd_class, write_sim_setting_dependent_cmds); + + /******************************** + * Command 'read_openfpga_bitstream_setting' + */ + ShellCommandId read_bitstream_setting_cmd_id = + add_read_bitstream_setting_command_template(shell, + openfpga_setup_cmd_class); + + /******************************** + * Command 'write_openfpga_bitstream_setting' + */ + /* The 'write_openfpga_bitstream_setting' command should NOT be executed + * before 'read_openfpga_bitstream_setting' */ + std::vector write_bitstream_setting_dependent_cmds( + 1, read_bitstream_setting_cmd_id); + add_write_bitstream_setting_command_template( + shell, openfpga_setup_cmd_class, write_bitstream_setting_dependent_cmds); + + /******************************** + * Command 'link_openfpga_arch' + */ + /* The 'link_openfpga_arch' command should NOT be executed before 'vpr' */ + std::vector link_arch_dependent_cmds; + link_arch_dependent_cmds.push_back(read_arch_cmd_id); + /* TODO: This will be uncommented when openfpga flow script is updated + */ + link_arch_dependent_cmds.push_back(read_sim_setting_cmd_id); + link_arch_dependent_cmds.push_back(vpr_cmd_id); + ShellCommandId link_arch_cmd_id = add_link_arch_command_template( + shell, openfpga_setup_cmd_class, link_arch_dependent_cmds); + + /******************************** + * Command 'write_gsb' + */ + /* The 'write_gsb' command should NOT be executed before 'link_openfpga_arch' + */ + std::vector write_gsb_dependent_cmds; + write_gsb_dependent_cmds.push_back(link_arch_cmd_id); + add_write_gsb_command_template(shell, openfpga_setup_cmd_class, + write_gsb_dependent_cmds); + + /******************************************* + * Command 'check_netlist_naming_conflict' + */ + /* The 'check_netlist_naming_conflict' command should NOT be executed before + * 'vpr' */ + std::vector nlist_naming_dependent_cmds; + nlist_naming_dependent_cmds.push_back(vpr_cmd_id); + add_check_netlist_naming_conflict_command_template( + shell, openfpga_setup_cmd_class, nlist_naming_dependent_cmds); + + /******************************** + * Command 'pb_pin_fixup' + */ + /* The 'pb_pin_fixup' command should NOT be executed before + * 'read_openfpga_arch' and 'vpr' */ + std::vector pb_pin_fixup_dependent_cmds; + pb_pin_fixup_dependent_cmds.push_back(read_arch_cmd_id); + pb_pin_fixup_dependent_cmds.push_back(vpr_cmd_id); + add_pb_pin_fixup_command_template(shell, openfpga_setup_cmd_class, + pb_pin_fixup_dependent_cmds); + + /******************************** + * Command 'lut_truth_table_fixup' + */ + /* The 'lut_truth_table_fixup' command should NOT be executed before + * 'read_openfpga_arch' and 'vpr' */ + std::vector lut_tt_fixup_dependent_cmds; + lut_tt_fixup_dependent_cmds.push_back(read_arch_cmd_id); + lut_tt_fixup_dependent_cmds.push_back(vpr_cmd_id); + add_lut_truth_table_fixup_command_template(shell, openfpga_setup_cmd_class, + lut_tt_fixup_dependent_cmds); + /******************************** + * Command 'build_fabric' + */ + /* The 'build_fabric' command should NOT be executed before + * 'link_openfpga_arch' */ + std::vector build_fabric_dependent_cmds; + build_fabric_dependent_cmds.push_back(link_arch_cmd_id); + ShellCommandId build_fabric_cmd_id = add_build_fabric_command_template( + shell, openfpga_setup_cmd_class, build_fabric_dependent_cmds); + + /******************************** + * Command 'write_fabric_hierarchy' + */ + /* The 'write_fabric_hierarchy' command should NOT be executed before + * 'build_fabric' */ + std::vector write_fabric_hie_dependent_cmds; + write_fabric_hie_dependent_cmds.push_back(build_fabric_cmd_id); + add_write_fabric_hierarchy_command_template(shell, openfpga_setup_cmd_class, + write_fabric_hie_dependent_cmds); + + /******************************** + * Command 'write_fabric_io_info' + */ + /* The 'write_fabric_io_info' command should NOT be executed before + * 'build_fabric' */ + std::vector cmd_dependency_write_fabric_io_info; + cmd_dependency_write_fabric_io_info.push_back(build_fabric_cmd_id); + add_write_fabric_io_info_command_template( + shell, openfpga_setup_cmd_class, cmd_dependency_write_fabric_io_info); +} + +} /* end namespace openfpga */ + +#endif diff --git a/openfpga/src/base/openfpga_write_gsb.h b/openfpga/src/base/openfpga_write_gsb.h deleted file mode 100644 index a059724cd..000000000 --- a/openfpga/src/base/openfpga_write_gsb.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef OPENFPGA_WRITE_GSB_H -#define OPENFPGA_WRITE_GSB_H - -/******************************************************************** - * Include header files that are required by function declaration - *******************************************************************/ -#include "command.h" -#include "command_context.h" -#include "openfpga_context.h" - -/******************************************************************** - * Function declaration - *******************************************************************/ - -/* begin namespace openfpga */ -namespace openfpga { - -int write_gsb(const OpenfpgaContext& openfpga_ctx, const Command& cmd, - const CommandContext& cmd_context); - -} /* end namespace openfpga */ - -#endif diff --git a/openfpga/src/base/openfpga_write_gsb.cpp b/openfpga/src/base/openfpga_write_gsb_template.h similarity index 91% rename from openfpga/src/base/openfpga_write_gsb.cpp rename to openfpga/src/base/openfpga_write_gsb_template.h index be74c2a11..1e09dc67c 100644 --- a/openfpga/src/base/openfpga_write_gsb.cpp +++ b/openfpga/src/base/openfpga_write_gsb_template.h @@ -1,16 +1,14 @@ +#ifndef OPENFPGA_WRITE_GSB_TEMPLATE_H +#define OPENFPGA_WRITE_GSB_TEMPLATE_H /******************************************************************** * This file includes functions to compress the hierachy of routing architecture *******************************************************************/ -/* Headers from vtrutil library */ #include "vtr_log.h" #include "vtr_time.h" - -/* Headers from openfpgashell library */ +#include "command.h" +#include "command_context.h" #include "command_exit_codes.h" -#include "openfpga_write_gsb.h" #include "write_xml_device_rr_gsb.h" - -/* Include global variables of VPR */ #include "globals.h" /* begin namespace openfpga */ @@ -20,7 +18,8 @@ namespace openfpga { * Write internal structrure of all the General Switch Blocks (GSBs) * to an XML file *******************************************************************/ -int write_gsb(const OpenfpgaContext& openfpga_ctx, const Command& cmd, +template +int write_gsb_template(const T& openfpga_ctx, const Command& cmd, const CommandContext& cmd_context) { /* Check the option '--file' is enabled or not * Actually, it must be enabled as the shell interface will check @@ -60,3 +59,5 @@ int write_gsb(const OpenfpgaContext& openfpga_ctx, const Command& cmd, } } /* end namespace openfpga */ + +#endif diff --git a/openfpga/src/utils/openfpga_rr_graph_utils.cpp b/openfpga/src/utils/openfpga_rr_graph_utils.cpp new file mode 100644 index 000000000..e612bbce2 --- /dev/null +++ b/openfpga/src/utils/openfpga_rr_graph_utils.cpp @@ -0,0 +1,37 @@ +#include "openfpga_rr_graph_utils.h" +#include "vtr_log.h" + +namespace openfpga { + +/******************************************************************** + * A function to identify if the routing resource graph generated by + * VPR is support by OpenFPGA + * - Currently we only support uni-directional + * It means every routing tracks must have a direction + *******************************************************************/ +bool is_vpr_rr_graph_supported(const RRGraphView& rr_graph) { + /* Check if the rr_graph is uni-directional*/ + for (const RRNodeId& node : rr_graph.nodes()) { + if (CHANX != rr_graph.node_type(node) && + CHANY != rr_graph.node_type(node)) { + continue; + } + if (Direction::BIDIR == rr_graph.node_direction(node)) { + VTR_LOG_ERROR( + "Routing resource graph is bi-directional. OpenFPGA currently supports " + "uni-directional routing architecture only.\n"); + return false; + } + if (Direction::NONE == rr_graph.node_direction(node)) { + VTR_LOG_ERROR( + "Routing resource graph contains routing tracks which has not specific " + "direction. OpenFPGA currently supports uni-directional routing " + "architecture only.\n"); + return false; + } + } + + return true; +} + +} /* end namespace openfpga */ diff --git a/openfpga/src/utils/openfpga_rr_graph_utils.h b/openfpga/src/utils/openfpga_rr_graph_utils.h new file mode 100644 index 000000000..91c619ceb --- /dev/null +++ b/openfpga/src/utils/openfpga_rr_graph_utils.h @@ -0,0 +1,13 @@ +#ifndef OPENFPGA_RR_GRAPH_UTILS_H +#define OPENFPGA_RR_GRAPH_UTILS_H + +#include "rr_graph_view.h" + +/* begin namespace openfpga */ +namespace openfpga { + +bool is_vpr_rr_graph_supported(const RRGraphView& rr_graph); + +} /* end namespace openfpga */ + +#endif