From 23f98d6a3b55938bdb9050f27f8579eff2f975fa Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Tue, 26 Jul 2022 13:55:29 -0700
Subject: [PATCH] [engine] fixed a few bugs

---
 openfpga/src/base/io_location_map.cpp                           | 2 +-
 .../generate_fabric_example_script.openfpga                     | 2 +-
 .../no_time_stamp_example_script.openfpga                       | 2 +-
 ...reconfigured_testbench_no_time_stamp_example_script.openfpga | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/openfpga/src/base/io_location_map.cpp b/openfpga/src/base/io_location_map.cpp
index 43bf856ed..df9724916 100644
--- a/openfpga/src/base/io_location_map.cpp
+++ b/openfpga/src/base/io_location_map.cpp
@@ -108,7 +108,7 @@ int IoLocationMap::write_to_xml_file(const std::string& fname,
   /* Walk through the fabric I/O location map data structure */
   for (size_t x = 0; x < io_indices_.size(); ++x) {
     for (size_t y = 0; y < io_indices_[x].size(); ++y) {
-      for (size_t z = 0; z < io_indices_[y].size(); ++z) {
+      for (size_t z = 0; z < io_indices_[x][y].size(); ++z) {
         for (const auto& name_id_pair : io_indices_[x][y][z]) {
           fp << "\t" << "<io pad=\"" << name_id_pair.first << "[" << name_id_pair.second << "]\"";
           fp << " " << "x=\"" << x << "\"";
diff --git a/openfpga_flow/openfpga_shell_scripts/generate_fabric_example_script.openfpga b/openfpga_flow/openfpga_shell_scripts/generate_fabric_example_script.openfpga
index 8f16bc21d..680ec13f2 100644
--- a/openfpga_flow/openfpga_shell_scripts/generate_fabric_example_script.openfpga
+++ b/openfpga_flow/openfpga_shell_scripts/generate_fabric_example_script.openfpga
@@ -26,7 +26,7 @@ write_fabric_hierarchy --file ./fabric_hierarchy.txt
 
 # Write the fabric I/O attributes to a file
 # This is used by pin constraint files
-write_fabric_io --file ./fabric_io_location.xml --verbose
+write_fabric_io_info --file ./fabric_io_location.xml --verbose
 
 # Write the Verilog netlist for FPGA fabric
 #  - Enable the use of explicit port mapping in Verilog netlist
diff --git a/openfpga_flow/openfpga_shell_scripts/no_time_stamp_example_script.openfpga b/openfpga_flow/openfpga_shell_scripts/no_time_stamp_example_script.openfpga
index 2fea20435..cd2274b43 100644
--- a/openfpga_flow/openfpga_shell_scripts/no_time_stamp_example_script.openfpga
+++ b/openfpga_flow/openfpga_shell_scripts/no_time_stamp_example_script.openfpga
@@ -34,7 +34,7 @@ write_fabric_hierarchy --file ./fabric_hierarchy.txt
 
 # Write the fabric I/O attributes to a file
 # This is used by pin constraint files
-write_fabric_io --file ./fabric_io_location.xml --verbose --no_time_stamp
+write_fabric_io_info --file ./fabric_io_location.xml --verbose --no_time_stamp
 
 # Repack the netlist to physical pbs
 # This must be done before bitstream generator and testbench generation
diff --git a/openfpga_flow/openfpga_shell_scripts/preconfigured_testbench_no_time_stamp_example_script.openfpga b/openfpga_flow/openfpga_shell_scripts/preconfigured_testbench_no_time_stamp_example_script.openfpga
index 02e7ba940..8c9352a63 100644
--- a/openfpga_flow/openfpga_shell_scripts/preconfigured_testbench_no_time_stamp_example_script.openfpga
+++ b/openfpga_flow/openfpga_shell_scripts/preconfigured_testbench_no_time_stamp_example_script.openfpga
@@ -32,7 +32,7 @@ write_fabric_hierarchy --file ./fabric_hierarchy.txt
 
 # Write the fabric I/O attributes to a file
 # This is used by pin constraint files
-write_fabric_io --file ./fabric_io_location.xml --verbose --no_time_stamp
+write_fabric_io_info --file ./fabric_io_location.xml --verbose --no_time_stamp
 
 # Repack the netlist to physical pbs
 # This must be done before bitstream generator and testbench generation