From 20f80a73e76c74f165441a304b0e7df38aa98599 Mon Sep 17 00:00:00 2001
From: AurelienUoU <u1235811@lnissrv4.eng.utah.edu>
Date: Tue, 28 May 2019 11:24:03 -0600
Subject: [PATCH] Correct path to tech files

---
 vpr7_x2p/vpr/ARCH/.travis_k6_N10_sram_chain_HC.xml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/vpr7_x2p/vpr/ARCH/.travis_k6_N10_sram_chain_HC.xml b/vpr7_x2p/vpr/ARCH/.travis_k6_N10_sram_chain_HC.xml
index 73e38335b..a9410260b 100644
--- a/vpr7_x2p/vpr/ARCH/.travis_k6_N10_sram_chain_HC.xml
+++ b/vpr7_x2p/vpr/ARCH/.travis_k6_N10_sram_chain_HC.xml
@@ -180,7 +180,7 @@
         </input>
       </stimulate>      
     </parameters>
-    <tech_lib lib_type="academia" transistor_type="TOP_TT" lib_path="/research/ece/lnis/USERS/alacchi/Current_release/branch_multimode/OpenFPGA/vpr7_x2p/tech/PTM_45nm/45nm.pm" nominal_vdd="1.0" io_vdd="2.5"/>
+    <tech_lib lib_type="academia" transistor_type="TOP_TT" lib_path="/research/ece/lnis/USERS/alacchi/Current_release/branch_multimode/OpenFPGA/fpga_flow/tech/PTM_45nm/45nm.pm" nominal_vdd="1.0" io_vdd="2.5"/>
     <transistors pn_ratio="2" model_ref="M">
       <nmos model_name="nch" chan_length="40e-9" min_width="140e-9"/>
       <pmos model_name="pch" chan_length="40e-9" min_width="140e-9"/>