bring changes related to post layout netlist and sdf generation for black box
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@ -8,11 +8,13 @@
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#include "AnalysisDelayCalculator.h"
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//Writes out the post-synthesis implementation netlists in BLIF and Verilog formats,
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//along with an SDF for delay annotations.
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//
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//All written filenames end in {basename}_post_synthesis.{fmt} where {basename} is the
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//basename argument and {fmt} is the file format (e.g. v, blif, sdf)
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/**
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* @brief Writes out the post-synthesis implementation netlists in BLIF and Verilog formats,
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* along with an SDF for delay annotations.
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*
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* All written filenames end in {basename}_post_synthesis.{fmt} where {basename} is the
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* basename argument and {fmt} is the file format (e.g. v, blif, sdf)
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*/
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void netlist_writer(const std::string basename, std::shared_ptr<const AnalysisDelayCalculator> delay_calc);
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#endif
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