From 1e53d79c570b35d16b0a8ca093d37cd89dcbff5e Mon Sep 17 00:00:00 2001 From: tangxifan Date: Tue, 28 Jul 2020 12:41:58 -0600 Subject: [PATCH] deploy large bitstream regression tests to CI --- .travis/fpga_bitstream_reg_test.sh | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/.travis/fpga_bitstream_reg_test.sh b/.travis/fpga_bitstream_reg_test.sh index dcce57081..8b9b6c0f4 100755 --- a/.travis/fpga_bitstream_reg_test.sh +++ b/.travis/fpga_bitstream_reg_test.sh @@ -10,9 +10,16 @@ cd ${TRAVIS_BUILD_DIR} ############################################## echo -e "FPGA-Bitstream regression tests"; -echo -e "Testing bitstream generation only"; +echo -e "Testing bitstream generation for an auto-sized device"; python3 openfpga_flow/scripts/run_fpga_task.py fpga_bitstream/generate_bitstream/device_auto --debug --show_thread_logs + +echo -e "Testing bitstream generation for an 48x48 FPGA device"; +python3 openfpga_flow/scripts/run_fpga_task.py fpga_bitstream/generate_bitstream/device_48x48 --debug --show_thread_logs + +echo -e "Testing bitstream generation for an 96x96 FPGA device"; +python3 openfpga_flow/scripts/run_fpga_task.py fpga_bitstream/generate_bitstream/device_96x96 --debug --show_thread_logs + echo -e "Testing loading architecture bitstream from an external file"; python3 openfpga_flow/scripts/run_fpga_task.py fpga_bitstream/load_external_architecture_bitstream --debug --show_thread_logs