From 3fa373f8bc39f15160a4af003f06eeffbcda2713 Mon Sep 17 00:00:00 2001 From: coolbreeze413 Date: Thu, 4 Nov 2021 07:22:09 +0530 Subject: [PATCH 01/10] add plugins, set yosys install for plugin --- .dockerignore | 12 ++++++------ .gitmodules | 4 ++++ CMakeLists.txt | 16 +++++++++++++++- .../misc/fpgaflow_default_tool_path.conf | 4 ++-- openfpga_flow/misc/qlf_yosys.ys | 3 +++ 5 files changed, 30 insertions(+), 9 deletions(-) diff --git a/.dockerignore b/.dockerignore index 93af49793..8240dff87 100644 --- a/.dockerignore +++ b/.dockerignore @@ -12,12 +12,12 @@ !/openfpga/openfpga !/vpr/libvpr.a !/vpr/vpr -!/yosys/share/ -!/yosys/yosys -!/yosys/yosys-abc -!/yosys/yosys-config -!/yosys/yosys-filterlib -!/yosys/yosys-smtbmc +!/yosys/install/share/ +!/yosys/install/bin/yosys +!/yosys/install/bin/yosys-abc +!/yosys/install/bin/yosys-config +!/yosys/install/bin/yosys-filterlib +!/yosys/install/bin/yosys-smtbmc !/openfpga_flow !/openfpga.sh !/openfpga_flow/ diff --git a/.gitmodules b/.gitmodules index 6aab6298c..e0a20dae3 100644 --- a/.gitmodules +++ b/.gitmodules @@ -2,3 +2,7 @@ path = yosys url = https://github.com/YosysHQ/yosys branch = release-branch-0.10 + ignore = dirty +[submodule "yosys-plugins"] + path = yosys-plugins + url = https://github.com/SymbiFlow/yosys-symbiflow-plugins diff --git a/CMakeLists.txt b/CMakeLists.txt index a6a055ba1..36655e110 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -231,13 +231,27 @@ include(CheckCXXCompilerFlag) add_custom_target( yosys ALL COMMAND $(MAKE) config-gcc - COMMAND $(MAKE) + COMMAND make clean + COMMAND $(MAKE) install PREFIX=${CMAKE_CURRENT_SOURCE_DIR}/yosys/install WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/yosys COMMENT "Compile Yosys with given Makefile" ) # yosys compilation ends +# yosys-plugins compilation starts +add_custom_target( + yosys-plugins ALL + COMMAND $(MAKE) clean YOSYS_PATH=${CMAKE_CURRENT_SOURCE_DIR}/yosys/install + COMMAND $(MAKE) install YOSYS_PATH=${CMAKE_CURRENT_SOURCE_DIR}/yosys/install + WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/yosys-plugins + DEPENDS ${CMAKE_CURRENT_SOURCE_DIR}/yosys/install/bin/yosys + #DEPENDS yosys + COMMENT "Compile Yosys-plugins with given Makefile" +) + +add_dependencies(yosys-plugins yosys) + # run make to extract compiler options, linker options and list of source files #add_custom_target( # yosys diff --git a/openfpga_flow/misc/fpgaflow_default_tool_path.conf b/openfpga_flow/misc/fpgaflow_default_tool_path.conf index 91108dbac..b0b25b100 100644 --- a/openfpga_flow/misc/fpgaflow_default_tool_path.conf +++ b/openfpga_flow/misc/fpgaflow_default_tool_path.conf @@ -1,10 +1,10 @@ # Standard Configuration Example [CAD_TOOLS_PATH] openfpga_shell_path = ${PATH:OPENFPGA_PATH}/openfpga/openfpga -yosys_path = ${PATH:OPENFPGA_PATH}/yosys/yosys +yosys_path = ${PATH:OPENFPGA_PATH}/yosys/install/bin/yosys misc_dir = ${PATH:OPENFPGA_PATH}/openfpga_flow/misc odin2_path = ${PATH:OPENFPGA_PATH}/openfpga_flow/not_used_atm/odin2.exe -abc_path = ${PATH:OPENFPGA_PATH}/yosys/yosys-abc +abc_path = ${PATH:OPENFPGA_PATH}/yosys/install/bin/yosys-abc abc_mccl_path = ${PATH:OPENFPGA_PATH}/abc_with_bb_support/abc abc_with_bb_support_path = ${PATH:OPENFPGA_PATH}/abc_with_bb_support/abc vpr_path = ${PATH:OPENFPGA_PATH}/vpr/vpr diff --git a/openfpga_flow/misc/qlf_yosys.ys b/openfpga_flow/misc/qlf_yosys.ys index 587769941..843f2e6cd 100644 --- a/openfpga_flow/misc/qlf_yosys.ys +++ b/openfpga_flow/misc/qlf_yosys.ys @@ -1,4 +1,7 @@ # Yosys synthesis script for ${TOP_MODULE} + +plugin -i ql-qlf + # Read verilog files ${READ_VERILOG_FILE} From d2ce4579cfbc1f51b315ba063baa006da9f8e32e Mon Sep 17 00:00:00 2001 From: coolbreeze413 Date: Thu, 4 Nov 2021 07:54:44 +0530 Subject: [PATCH 02/10] add yosys-symbiflow-plugins submodule --- yosys-plugins | 1 + 1 file changed, 1 insertion(+) create mode 160000 yosys-plugins diff --git a/yosys-plugins b/yosys-plugins new file mode 160000 index 000000000..ae520b9ab --- /dev/null +++ b/yosys-plugins @@ -0,0 +1 @@ +Subproject commit ae520b9ab96ffcf3033ba30f1b4c0aa8c3952db7 From 192eb1e65503f1aaee452de248789e5063173330 Mon Sep 17 00:00:00 2001 From: coolbreeze413 Date: Thu, 4 Nov 2021 09:11:57 +0530 Subject: [PATCH 03/10] correct yosys paths for CI --- .github/workflows/build.yml | 22 +++++++++++----------- docker/Dockerfile.master | 4 ++-- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index aad5baf79..38aa97d66 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -170,12 +170,12 @@ jobs: openfpga/openfpga vpr/libvpr.a vpr/vpr - yosys/share/ - yosys/yosys - yosys/yosys-abc - yosys/yosys-config - yosys/yosys-filterlib - yosys/yosys-smtbmc + yosys/install/share/ + yosys/install/bin/yosys + yosys/install/bin/yosys-abc + yosys/install/bin/yosys-config + yosys/install/bin/yosys-filterlib + yosys/install/bin/yosys-smtbmc openfpga_flow openfpga.sh docker_distribution: @@ -240,11 +240,11 @@ jobs: chmod +x ace2/ace chmod +x openfpga/openfpga chmod +x vpr/vpr - chmod +x yosys/yosys - chmod +x yosys/yosys-abc - chmod +x yosys/yosys-config - chmod +x yosys/yosys-filterlib - chmod +x yosys/yosys-smtbmc + chmod +x yosys/install/bin/yosys + chmod +x yosys/install/bin/yosys-abc + chmod +x yosys/install/bin/yosys-config + chmod +x yosys/install/bin/yosys-filterlib + chmod +x yosys/install/bin/yosys-smtbmc - name: ${{matrix.config.name}}_GCC-8_(Ubuntu 18.04) shell: bash run: source openfpga.sh && source openfpga_flow/regression_test_scripts/${{matrix.config.name}}.sh diff --git a/docker/Dockerfile.master b/docker/Dockerfile.master index 872ce07a8..783197ee6 100644 --- a/docker/Dockerfile.master +++ b/docker/Dockerfile.master @@ -3,7 +3,7 @@ RUN mkdir -p /opt/openfpga WORKDIR /opt/openfpga COPY . /opt/openfpga RUN chmod +x abc/abc ace2/ace openfpga/openfpga vpr/vpr -RUN chmod +x yosys/yosys yosys/yosys-abc yosys/yosys-config yosys/yosys-filterlib yosys/yosys-smtbmc -ENV PATH="/opt/openfpga/openfpga:/opt/openfpga/yosys:${PATH}" +RUN chmod +x yosys/install/bin/yosys yosys/install/bin/yosys-abc yosys/install/bin/yosys-config yosys/install/bin/yosys-filterlib yosys/install/bin/yosys-smtbmc +ENV PATH="/opt/openfpga/openfpga:/opt/openfpga/yosys/install/bin:${PATH}" ENV PATH="/opt/openfpga/ace2:/opt/openfpga/abc:/opt/openfpga/vpr:${PATH}" ENV OPENFPGA_PATH="/opt/openfpga" From a823c3e143ce6d67dd47d820b2eba29e498760b2 Mon Sep 17 00:00:00 2001 From: coolbreeze413 Date: Thu, 4 Nov 2021 10:19:25 +0530 Subject: [PATCH 04/10] remove clean step in build to avoid long compilation times --- CMakeLists.txt | 3 --- 1 file changed, 3 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 36655e110..db92c522d 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -231,7 +231,6 @@ include(CheckCXXCompilerFlag) add_custom_target( yosys ALL COMMAND $(MAKE) config-gcc - COMMAND make clean COMMAND $(MAKE) install PREFIX=${CMAKE_CURRENT_SOURCE_DIR}/yosys/install WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/yosys COMMENT "Compile Yosys with given Makefile" @@ -242,11 +241,9 @@ add_custom_target( # yosys-plugins compilation starts add_custom_target( yosys-plugins ALL - COMMAND $(MAKE) clean YOSYS_PATH=${CMAKE_CURRENT_SOURCE_DIR}/yosys/install COMMAND $(MAKE) install YOSYS_PATH=${CMAKE_CURRENT_SOURCE_DIR}/yosys/install WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/yosys-plugins DEPENDS ${CMAKE_CURRENT_SOURCE_DIR}/yosys/install/bin/yosys - #DEPENDS yosys COMMENT "Compile Yosys-plugins with given Makefile" ) From 840fa399c6ddc80582e6a72bf31abde63bd1f75d Mon Sep 17 00:00:00 2001 From: coolbreeze413 Date: Tue, 9 Nov 2021 21:36:33 +0530 Subject: [PATCH 05/10] enable single counter test (fails, needs debug) --- .../quicklogic_reg_test.sh | 6 +- .../flow_test/config/task.conf | 56 +++++++++---------- 2 files changed, 31 insertions(+), 31 deletions(-) diff --git a/openfpga_flow/regression_test_scripts/quicklogic_reg_test.sh b/openfpga_flow/regression_test_scripts/quicklogic_reg_test.sh index 84c76cc9f..26a76e322 100755 --- a/openfpga_flow/regression_test_scripts/quicklogic_reg_test.sh +++ b/openfpga_flow/regression_test_scripts/quicklogic_reg_test.sh @@ -10,9 +10,9 @@ echo -e "QuickLogic regression tests"; # TODO: Disabled all the tests here because Quicklogic's synthesis script is not in Yosys v0.10 release. Will bring back once Quicklogic manages to merge their contribution to Yosys upstream -##echo -e "Testing yosys flow using custom ys script for running quicklogic device"; -##run-task quicklogic_tests/flow_test --debug --show_thread_logs -## +echo -e "Testing yosys flow using custom ys script for running quicklogic device"; +run-task quicklogic_tests/flow_test --debug --show_thread_logs + ##echo -e "Testing yosys flow using custom ys script for running multi-clock quicklogic device"; ##run-task quicklogic_tests/counter_5clock_test --debug --show_thread_logs ##run-task quicklogic_tests/sdc_controller_test --debug --show_thread_logs diff --git a/openfpga_flow/tasks/quicklogic_tests/flow_test/config/task.conf b/openfpga_flow/tasks/quicklogic_tests/flow_test/config/task.conf index e3400e574..45fb3435c 100644 --- a/openfpga_flow/tasks/quicklogic_tests/flow_test/config/task.conf +++ b/openfpga_flow/tasks/quicklogic_tests/flow_test/config/task.conf @@ -26,58 +26,58 @@ yosys_args = -no_adder -family qlf_k4n8 -no_ff_map arch0=${PATH:OPENFPGA_PATH}/openfpga_flow/vpr_arch/k4_N4_tileable_40nm.xml [BENCHMARKS] -bench0=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/io_tc1/rtl/*.v -bench1=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/unsigned_mult_80/rtl/*.v -bench2=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/bin2bcd/bin2bcd.v +#bench0=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/io_tc1/rtl/*.v +#bench1=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/unsigned_mult_80/rtl/*.v +#bench2=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/bin2bcd/bin2bcd.v bench3=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/counter/counter.v -bench5=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/rs_decoder/rtl/rs_decoder.v -bench6=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/simon_bit_serial/rtl/*.v -bench7=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/sha256/rtl/*.v +#bench5=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/rs_decoder/rtl/rs_decoder.v +#bench6=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/simon_bit_serial/rtl/*.v +#bench7=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/sha256/rtl/*.v #cavlc_top requires async reset/preset #bench8=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/cavlc_top/rtl/*.v -bench9=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/cf_fft_256_8/rtl/*.v +#bench9=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/cf_fft_256_8/rtl/*.v # counter120bitx5 requires 5 clocks #bench10=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/counter120bitx5/rtl/*.v -bench11=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/counter_16bit/rtl/*.v -bench12=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/dct_mac/rtl/*.v -bench13=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/des_perf/rtl/*.v -bench14=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/diffeq_f_systemC/rtl/*.v +#bench11=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/counter_16bit/rtl/*.v +#bench12=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/dct_mac/rtl/*.v +#bench13=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/des_perf/rtl/*.v +#bench14=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/diffeq_f_systemC/rtl/*.v #i2c_master_top requires async reset/preset #bench15=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/i2c_master_top/rtl/*.v #iir requires async reset/preset #bench16=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/iir/rtl/*.v #jpeg_qnr requires async reset/preset #bench17=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/jpeg_qnr/rtl/*.v -bench18=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/multi_enc_decx2x4/rtl/*.v +#bench18=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/multi_enc_decx2x4/rtl/*.v # sdc_controller requires 4 clocks #bench19=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/quicklogic_tests/sdc_controller/rtl/*.v [SYNTHESIS_PARAM] bench_yosys_common=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/qlf_yosys.ys -bench0_top = io_tc1 -bench1_top = unsigned_mult_80 -bench2_top = bin2bcd +#bench0_top = io_tc1 +#bench1_top = unsigned_mult_80 +#bench2_top = bin2bcd bench3_top = counter -bench5_top = rs_decoder_top -bench6_top = top_module -bench7_top = sha256 -bench8_top = cavlc_top +#bench5_top = rs_decoder_top +#bench6_top = top_module +#bench7_top = sha256 +#bench8_top = cavlc_top #bench8_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/ys_tmpl_yosys_vpr_flow.ys -bench9_top = cf_fft_256_8 +#bench9_top = cf_fft_256_8 #bench10_top = counter120bitx5 #bench10_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/qlf_yosys.ys -bench11_top = top -bench12_top = dct_mac -bench13_top = des_perf -bench14_top = diffeq_f_systemC -bench15_top = i2c_master_top +#bench11_top = top +#bench12_top = dct_mac +#bench13_top = des_perf +#bench14_top = diffeq_f_systemC +#bench15_top = i2c_master_top #bench15_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/ys_tmpl_yosys_vpr_flow.ys -bench16_top = iir +#bench16_top = iir #bench16_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/ys_tmpl_yosys_vpr_flow.ys -bench17_top = jpeg_qnr +#bench17_top = jpeg_qnr #bench17_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/ys_tmpl_yosys_vpr_flow.ys -bench18_top = multi_enc_decx2x4 +#bench18_top = multi_enc_decx2x4 # sdc_controller requires 4 clocks #bench19_top = sdc_controller #bench19_yosys=${PATH:OPENFPGA_PATH}/openfpga_flow/misc/qlf_yosys.ys From 7b611601fcaff5167ecfb5af2db656386038ba62 Mon Sep 17 00:00:00 2001 From: Lalit Sharma Date: Fri, 12 Nov 2021 01:14:01 -0800 Subject: [PATCH 06/10] Bumping up changes to submodule yosys-plugins --- yosys-plugins | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/yosys-plugins b/yosys-plugins index ae520b9ab..6f7e4741b 160000 --- a/yosys-plugins +++ b/yosys-plugins @@ -1 +1 @@ -Subproject commit ae520b9ab96ffcf3033ba30f1b4c0aa8c3952db7 +Subproject commit 6f7e4741bf81d08a6a23b1120534495724da745e From fe74c42252cf82cd194688ac552f4ae18028ab8e Mon Sep 17 00:00:00 2001 From: Lalit Sharma Date: Fri, 12 Nov 2021 01:46:06 -0800 Subject: [PATCH 07/10] Updating yosys-plugin compilation to create command synth_ql instead of synth_quicklogic. This is done to surpass the assertion failure --- CMakeLists.txt | 4 +++- Makefile | 2 +- openfpga_flow/misc/qlf_yosys.ys | 2 +- 3 files changed, 5 insertions(+), 3 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index db92c522d..01fcd19f1 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -231,6 +231,7 @@ include(CheckCXXCompilerFlag) add_custom_target( yosys ALL COMMAND $(MAKE) config-gcc + COMMAND $(MAKE) clean COMMAND $(MAKE) install PREFIX=${CMAKE_CURRENT_SOURCE_DIR}/yosys/install WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/yosys COMMENT "Compile Yosys with given Makefile" @@ -241,7 +242,8 @@ add_custom_target( # yosys-plugins compilation starts add_custom_target( yosys-plugins ALL - COMMAND $(MAKE) install YOSYS_PATH=${CMAKE_CURRENT_SOURCE_DIR}/yosys/install + COMMAND $(MAKE) clean YOSYS_PATH=${CMAKE_CURRENT_SOURCE_DIR}/yosys/install + COMMAND $(MAKE) install_ql-qlf YOSYS_PATH=${CMAKE_CURRENT_SOURCE_DIR}/yosys/install EXTRA_FLAGS="-DPASS_NAME=synth_ql" WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/yosys-plugins DEPENDS ${CMAKE_CURRENT_SOURCE_DIR}/yosys/install/bin/yosys COMMENT "Compile Yosys-plugins with given Makefile" diff --git a/Makefile b/Makefile index d8b91a791..96557a9b8 100644 --- a/Makefile +++ b/Makefile @@ -21,7 +21,7 @@ compile: cd build && $(MAKE) clean: - rm -rf build + rm -rf build yosys/install build/Makefile: make checkout diff --git a/openfpga_flow/misc/qlf_yosys.ys b/openfpga_flow/misc/qlf_yosys.ys index 843f2e6cd..1f7a1d4c3 100644 --- a/openfpga_flow/misc/qlf_yosys.ys +++ b/openfpga_flow/misc/qlf_yosys.ys @@ -5,6 +5,6 @@ plugin -i ql-qlf # Read verilog files ${READ_VERILOG_FILE} -synth_quicklogic -blif ${OUTPUT_BLIF} -top ${TOP_MODULE} ${YOSYS_ARGS} +synth_ql -blif ${OUTPUT_BLIF} -top ${TOP_MODULE} ${YOSYS_ARGS} write_verilog -noattr -nohex ${OUTPUT_VERILOG} From 756b64671b17ad0ba826f118b4e903f39c0ac00f Mon Sep 17 00:00:00 2001 From: Lalit Sharma Date: Fri, 12 Nov 2021 02:33:25 -0800 Subject: [PATCH 08/10] Fixing yosys checkout error --- .gitmodules | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/.gitmodules b/.gitmodules index e0a20dae3..3c037131b 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,8 +1,7 @@ [submodule "yosys"] path = yosys url = https://github.com/YosysHQ/yosys - branch = release-branch-0.10 - ignore = dirty + branch = release-branch-0.10 [submodule "yosys-plugins"] path = yosys-plugins url = https://github.com/SymbiFlow/yosys-symbiflow-plugins From 264023c2c9a75bd00de86aa14e4d89fcd7e2a834 Mon Sep 17 00:00:00 2001 From: coolbreeze413 Date: Mon, 15 Nov 2021 21:41:17 +0530 Subject: [PATCH 09/10] remove clean step in compilation of yosys/plugins to check CI --- CMakeLists.txt | 2 -- 1 file changed, 2 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 01fcd19f1..4ec05aa84 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -231,7 +231,6 @@ include(CheckCXXCompilerFlag) add_custom_target( yosys ALL COMMAND $(MAKE) config-gcc - COMMAND $(MAKE) clean COMMAND $(MAKE) install PREFIX=${CMAKE_CURRENT_SOURCE_DIR}/yosys/install WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/yosys COMMENT "Compile Yosys with given Makefile" @@ -242,7 +241,6 @@ add_custom_target( # yosys-plugins compilation starts add_custom_target( yosys-plugins ALL - COMMAND $(MAKE) clean YOSYS_PATH=${CMAKE_CURRENT_SOURCE_DIR}/yosys/install COMMAND $(MAKE) install_ql-qlf YOSYS_PATH=${CMAKE_CURRENT_SOURCE_DIR}/yosys/install EXTRA_FLAGS="-DPASS_NAME=synth_ql" WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/yosys-plugins DEPENDS ${CMAKE_CURRENT_SOURCE_DIR}/yosys/install/bin/yosys From 5293ba8357a6192dafaa9ca9074ce7515b656e54 Mon Sep 17 00:00:00 2001 From: coolbreeze413 Date: Wed, 17 Nov 2021 15:43:45 +0530 Subject: [PATCH 10/10] update yosys-symbiflow-plugins to latest to fix quicklogic tests --- .gitmodules | 3 ++- yosys-plugins | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/.gitmodules b/.gitmodules index 3c037131b..7f958de95 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,7 +1,8 @@ [submodule "yosys"] path = yosys url = https://github.com/YosysHQ/yosys - branch = release-branch-0.10 + branch = release-branch-0.10 + ignore = dirty [submodule "yosys-plugins"] path = yosys-plugins url = https://github.com/SymbiFlow/yosys-symbiflow-plugins diff --git a/yosys-plugins b/yosys-plugins index 6f7e4741b..c44f18875 160000 --- a/yosys-plugins +++ b/yosys-plugins @@ -1 +1 @@ -Subproject commit 6f7e4741bf81d08a6a23b1120534495724da745e +Subproject commit c44f188756783b2a9bc7197a0c72fd3f3698da1f