From 1842bf51e1d37bbc077a3fe211665ff465d1795b Mon Sep 17 00:00:00 2001 From: tangxifan Date: Thu, 11 Jun 2020 11:22:47 -0600 Subject: [PATCH] deploy read_openfpga_simulation_setting in CI on a single test case --- .../configuration_chain_example_script.openfpga | 2 +- .../full_testbench/configuration_chain/config/task.conf | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/openfpga_flow/OpenFPGAShellScripts/configuration_chain_example_script.openfpga b/openfpga_flow/OpenFPGAShellScripts/configuration_chain_example_script.openfpga index 7492854a2..0cf8a6448 100644 --- a/openfpga_flow/OpenFPGAShellScripts/configuration_chain_example_script.openfpga +++ b/openfpga_flow/OpenFPGAShellScripts/configuration_chain_example_script.openfpga @@ -6,7 +6,7 @@ vpr ${VPR_ARCH_FILE} ${VPR_TESTBENCH_BLIF} --clock_modeling route read_openfpga_arch -f ${OPENFPGA_ARCH_FILE} # Read OpenFPGA simulation settings -#read_openfpga_simulation_setting -f OPENFPGA_SIM_SETTING_FILE +read_openfpga_simulation_setting -f ${OPENFPGA_SIM_SETTING_FILE} # Annotate the OpenFPGA architecture to VPR data base # to debug use --verbose options diff --git a/openfpga_flow/tasks/openfpga_shell/full_testbench/configuration_chain/config/task.conf b/openfpga_flow/tasks/openfpga_shell/full_testbench/configuration_chain/config/task.conf index 8318c1dea..9b4921136 100644 --- a/openfpga_flow/tasks/openfpga_shell/full_testbench/configuration_chain/config/task.conf +++ b/openfpga_flow/tasks/openfpga_shell/full_testbench/configuration_chain/config/task.conf @@ -16,6 +16,7 @@ verilog_output=true timeout_each_job = 20*60 fpga_flow=vpr_blif openfpga_arch_file=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_arch/k4_N4_40nm_cc_openfpga.xml +openfpga_sim_setting_file=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_simulation_settings/auto_sim_openfpga.xml [ARCHITECTURES] arch0=${PATH:OPENFPGA_PATH}/openfpga_flow/arch/vpr_only_templates/k4_N4_tileable_40nm.xml