riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

[Doc] Update README in openfpga arch directory for native fracturable LUT design

This commit is contained in:
tangxifan 2020-11-25 22:19:20 -07:00
parent f6a667de58
commit 17070c6405
1 changed files with 3 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
openfpga_flow/openfpga_arch/README.md
View File

@ -2,8 +2,9 @@
Please reveal the following architecture features in the names to help quickly spot architecture files. Please reveal the following architecture features in the names to help quickly spot architecture files.
Note that an OpenFPGA architecture can be applied to multiple VPR architecture files. Note that an OpenFPGA architecture can be applied to multiple VPR architecture files.
- k<lut\_size>: Look-Up Table (LUT) size of FPGA. If you have fracturable LUTs or multiple LUT circuits, this should be largest input size. - k<lut\_size>\_<frac><Native>: Look-Up Table (LUT) size of FPGA. If you have fracturable LUTs or multiple LUT circuits, this should be largest input size.
- frac: If fracturable LUT is used or not. * The keyword 'frac' is to specify if fracturable LUT is used or not.
* The keyword 'Native' is to specify if fracturable LUT design is a native one (without mode switch) or a standard one (with mode switch).
- N<le\_size>: Number of logic elements for a CLB. If you have multiple CLB architectures, this should be largest number. - N<le\_size>: Number of logic elements for a CLB. If you have multiple CLB architectures, this should be largest number.
- adder\_chain: If hard adder/carry chain is used inside CLBs - adder\_chain: If hard adder/carry chain is used inside CLBs
- register\_chain: If shift register chain is used inside CLBs - register\_chain: If shift register chain is used inside CLBs