split simulation settings to a separated XML file
This commit is contained in:
parent
b8bc74cc26
commit
15f087598c
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@ -2,7 +2,7 @@ cmake_minimum_required(VERSION 3.9)
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project("libarchopenfpga")
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project("libarchopenfpga")
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file(GLOB_RECURSE EXEC_SOURCES test/main.cpp)
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file(GLOB_RECURSE EXEC_SOURCES test/*.cpp)
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file(GLOB_RECURSE LIB_SOURCES src/*.cpp)
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file(GLOB_RECURSE LIB_SOURCES src/*.cpp)
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file(GLOB_RECURSE LIB_HEADERS src/*.h)
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file(GLOB_RECURSE LIB_HEADERS src/*.h)
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files_to_dirs(LIB_HEADERS LIB_INCLUDE_DIRS)
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files_to_dirs(LIB_HEADERS LIB_INCLUDE_DIRS)
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@ -26,13 +26,10 @@ target_link_libraries(libarchopenfpga
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libpugiutil)
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libpugiutil)
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#Create the test executable
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#Create the test executable
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add_executable(read_arch_openfpga ${EXEC_SOURCES})
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foreach(testsourcefile ${EXEC_SOURCES})
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target_link_libraries(read_arch_openfpga libarchopenfpga)
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# Use a simple string replace, to cut off .cpp.
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get_filename_component(testname ${testsourcefile} NAME_WE)
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#Supress IPO link warnings if IPO is enabled
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add_executable(${testname} ${testsourcefile})
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get_target_property(READ_ARCH_USES_IPO read_arch_openfpga INTERPROCEDURAL_OPTIMIZATION)
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# Make sure the library is linked to each test executable
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if (READ_ARCH_USES_IPO)
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target_link_libraries(${testname} libarchopenfpga)
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set_target_properties(read_arch_openfpga PROPERTIES LINK_FLAGS ${IPO_LINK_WARN_SUPRESS_FLAGS})
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endforeach(testsourcefile ${EXEC_SOURCES})
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endif()
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install(TARGETS libarchopenfpga read_arch_openfpga DESTINATION bin)
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@ -0,0 +1,36 @@
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<!-- An example of simulation settings, where we define the options
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and process variations to be considered in simulations
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-->
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<openfpga_simulation_setting>
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<clock_setting>
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<operating frequency="200e6" num_cycles="auto" slack="0.2"/>
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<programming frequency="10e6"/>
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</clock_setting>
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<simulator_option>
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<operating_condition temperature="25"/>
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<output_log verbose="false" captab="false"/>
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<accuracy type="abs" value="1e-13"/>
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<runtime fast_simulation="true"/>
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</simulator_option>
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<monte_carlo num_simulation_points="2"/>
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<measurement_setting>
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<slew>
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<rise upper_thres_pct="0.95" lower_thres_pct="0.05"/>
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<fall upper_thres_pct="0.05" lower_thres_pct="0.95"/>
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</slew>
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<delay>
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<rise input_thres_pct="0.5" output_thres_pct="0.5"/>
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<fall input_thres_pct="0.5" output_thres_pct="0.5"/>
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</delay>
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</measurement_setting>
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<stimulus>
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<clock>
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<rise slew_type="abs" slew_time="20e-12" />
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<fall slew_type="abs" slew_time="20e-12" />
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</clock>
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<input>
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<rise slew_type="abs" slew_time="25e-12" />
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<fall slew_type="abs" slew_time="25e-12" />
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</input>
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</stimulus>
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</openfpga_simulation_setting>
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@ -113,3 +113,35 @@ openfpga::Arch read_xml_openfpga_arch(const char* arch_file_name) {
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return openfpga_arch;
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return openfpga_arch;
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}
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}
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/********************************************************************
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* Top-level function to parse an XML file and load data to simulation settings
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*******************************************************************/
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openfpga::SimulationSetting read_xml_openfpga_simulation_settings(const char* sim_setting_file_name) {
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vtr::ScopedStartFinishTimer timer("Read OpenFPGA simulation settings");
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openfpga::SimulationSetting openfpga_sim_setting;
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pugi::xml_node Next;
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/* Parse the file */
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pugi::xml_document doc;
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pugiutil::loc_data loc_data;
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try {
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loc_data = pugiutil::load_xml(doc, sim_setting_file_name);
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/* Second node should be <openfpga_simulation_setting> */
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auto xml_simulation_settings = get_single_child(doc, "openfpga_simulation_setting", loc_data);
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/* Parse simulation settings to data structure */
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openfpga_sim_setting = read_xml_simulation_setting(xml_simulation_settings, loc_data);
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} catch (pugiutil::XmlError& e) {
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archfpga_throw(sim_setting_file_name, e.line(),
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"%s", e.what());
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}
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return openfpga_sim_setting;
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}
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@ -12,4 +12,6 @@
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*******************************************************************/
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*******************************************************************/
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openfpga::Arch read_xml_openfpga_arch(const char* arch_file_name);
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openfpga::Arch read_xml_openfpga_arch(const char* arch_file_name);
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openfpga::SimulationSetting read_xml_openfpga_simulation_settings(const char* sim_setting_file_name);
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#endif
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#endif
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@ -40,7 +40,7 @@ e_sim_accuracy_type string_to_sim_accuracy_type(const std::string& type_string)
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static
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static
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void read_xml_clock_setting(pugi::xml_node& xml_clock_setting,
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void read_xml_clock_setting(pugi::xml_node& xml_clock_setting,
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const pugiutil::loc_data& loc_data,
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const pugiutil::loc_data& loc_data,
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SimulationSetting& sim_setting) {
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openfpga::SimulationSetting& sim_setting) {
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/* Parse operating clock setting */
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/* Parse operating clock setting */
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pugi::xml_node xml_operating_clock_setting = get_single_child(xml_clock_setting, "operating", loc_data);
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pugi::xml_node xml_operating_clock_setting = get_single_child(xml_clock_setting, "operating", loc_data);
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@ -73,7 +73,7 @@ void read_xml_clock_setting(pugi::xml_node& xml_clock_setting,
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static
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static
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void read_xml_simulator_option(pugi::xml_node& xml_sim_option,
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void read_xml_simulator_option(pugi::xml_node& xml_sim_option,
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const pugiutil::loc_data& loc_data,
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const pugiutil::loc_data& loc_data,
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SimulationSetting& sim_setting) {
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openfpga::SimulationSetting& sim_setting) {
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pugi::xml_node xml_operating_condition = get_single_child(xml_sim_option, "operating_condition", loc_data);
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pugi::xml_node xml_operating_condition = get_single_child(xml_sim_option, "operating_condition", loc_data);
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sim_setting.set_simulation_temperature(get_attribute(xml_operating_condition, "temperature", loc_data).as_float(0.));
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sim_setting.set_simulation_temperature(get_attribute(xml_operating_condition, "temperature", loc_data).as_float(0.));
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@ -119,7 +119,7 @@ void read_xml_simulator_option(pugi::xml_node& xml_sim_option,
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static
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static
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void read_xml_monte_carlo(pugi::xml_node& xml_mc,
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void read_xml_monte_carlo(pugi::xml_node& xml_mc,
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const pugiutil::loc_data& loc_data,
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const pugiutil::loc_data& loc_data,
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SimulationSetting& sim_setting) {
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openfpga::SimulationSetting& sim_setting) {
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sim_setting.set_monte_carlo_simulation_points(get_attribute(xml_mc, "num_simulation_points", loc_data).as_int(0));
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sim_setting.set_monte_carlo_simulation_points(get_attribute(xml_mc, "num_simulation_points", loc_data).as_int(0));
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}
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}
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@ -129,7 +129,7 @@ void read_xml_monte_carlo(pugi::xml_node& xml_mc,
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static
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static
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void read_xml_measurement_setting(pugi::xml_node& xml_measurement,
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void read_xml_measurement_setting(pugi::xml_node& xml_measurement,
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const pugiutil::loc_data& loc_data,
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const pugiutil::loc_data& loc_data,
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SimulationSetting& sim_setting) {
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openfpga::SimulationSetting& sim_setting) {
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pugi::xml_node xml_slew = get_single_child(xml_measurement, "slew", loc_data);
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pugi::xml_node xml_slew = get_single_child(xml_measurement, "slew", loc_data);
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pugi::xml_node xml_slew_rise = get_single_child(xml_slew, "rise", loc_data);
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pugi::xml_node xml_slew_rise = get_single_child(xml_slew, "rise", loc_data);
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sim_setting.set_measure_slew_upper_threshold(SIM_SIGNAL_RISE, get_attribute(xml_slew_rise, "upper_thres_pct", loc_data).as_float(0.));
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sim_setting.set_measure_slew_upper_threshold(SIM_SIGNAL_RISE, get_attribute(xml_slew_rise, "upper_thres_pct", loc_data).as_float(0.));
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@ -155,7 +155,7 @@ void read_xml_measurement_setting(pugi::xml_node& xml_measurement,
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static
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static
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void read_xml_stimulus_clock(pugi::xml_node& xml_stimuli_clock,
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void read_xml_stimulus_clock(pugi::xml_node& xml_stimuli_clock,
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const pugiutil::loc_data& loc_data,
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const pugiutil::loc_data& loc_data,
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SimulationSetting& sim_setting,
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openfpga::SimulationSetting& sim_setting,
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const e_sim_signal_type& signal_type) {
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const e_sim_signal_type& signal_type) {
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/* Find the type of accuracy */
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/* Find the type of accuracy */
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const char* type_attr = get_attribute(xml_stimuli_clock, "slew_type", loc_data).value();
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const char* type_attr = get_attribute(xml_stimuli_clock, "slew_type", loc_data).value();
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@ -188,7 +188,7 @@ void read_xml_stimulus_clock(pugi::xml_node& xml_stimuli_clock,
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static
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static
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void read_xml_stimulus_input(pugi::xml_node& xml_stimuli_input,
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void read_xml_stimulus_input(pugi::xml_node& xml_stimuli_input,
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const pugiutil::loc_data& loc_data,
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const pugiutil::loc_data& loc_data,
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SimulationSetting& sim_setting,
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openfpga::SimulationSetting& sim_setting,
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const e_sim_signal_type& signal_type) {
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const e_sim_signal_type& signal_type) {
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/* Find the type of accuracy */
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/* Find the type of accuracy */
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const char* type_attr = get_attribute(xml_stimuli_input, "slew_type", loc_data).value();
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const char* type_attr = get_attribute(xml_stimuli_input, "slew_type", loc_data).value();
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@ -221,7 +221,7 @@ void read_xml_stimulus_input(pugi::xml_node& xml_stimuli_input,
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static
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static
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void read_xml_stimulus(pugi::xml_node& xml_stimulus,
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void read_xml_stimulus(pugi::xml_node& xml_stimulus,
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const pugiutil::loc_data& loc_data,
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const pugiutil::loc_data& loc_data,
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SimulationSetting& sim_setting) {
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openfpga::SimulationSetting& sim_setting) {
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pugi::xml_node xml_clock = get_single_child(xml_stimulus, "clock", loc_data);
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pugi::xml_node xml_clock = get_single_child(xml_stimulus, "clock", loc_data);
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pugi::xml_node xml_clock_rise = get_single_child(xml_clock, "rise", loc_data);
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pugi::xml_node xml_clock_rise = get_single_child(xml_clock, "rise", loc_data);
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read_xml_stimulus_clock(xml_clock_rise, loc_data, sim_setting, SIM_SIGNAL_RISE);
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read_xml_stimulus_clock(xml_clock_rise, loc_data, sim_setting, SIM_SIGNAL_RISE);
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@ -240,9 +240,9 @@ void read_xml_stimulus(pugi::xml_node& xml_stimulus,
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/********************************************************************
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/********************************************************************
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* Parse XML codes about <openfpga_simulation_setting> to an object of technology library
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* Parse XML codes about <openfpga_simulation_setting> to an object of technology library
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*******************************************************************/
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*******************************************************************/
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SimulationSetting read_xml_simulation_setting(pugi::xml_node& Node,
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openfpga::SimulationSetting read_xml_simulation_setting(pugi::xml_node& Node,
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const pugiutil::loc_data& loc_data) {
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const pugiutil::loc_data& loc_data) {
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SimulationSetting sim_setting;
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openfpga::SimulationSetting sim_setting;
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/* Parse clock settings */
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/* Parse clock settings */
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pugi::xml_node xml_clock_setting = get_single_child(Node, "clock_setting", loc_data);
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pugi::xml_node xml_clock_setting = get_single_child(Node, "clock_setting", loc_data);
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@ -11,7 +11,8 @@
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/********************************************************************
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/********************************************************************
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* Function declaration
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* Function declaration
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*******************************************************************/
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*******************************************************************/
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SimulationSetting read_xml_simulation_setting(pugi::xml_node& Node,
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const pugiutil::loc_data& loc_data);
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openfpga::SimulationSetting read_xml_simulation_setting(pugi::xml_node& Node,
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const pugiutil::loc_data& loc_data);
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#endif
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#endif
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#include "simulation_setting.h"
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#include "simulation_setting.h"
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/* namespace openfpga begins */
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namespace openfpga {
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/************************************************************************
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/************************************************************************
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* Member functions for class SimulationSetting
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* Member functions for class SimulationSetting
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***********************************************************************/
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***********************************************************************/
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@ -208,3 +211,5 @@ void SimulationSetting::set_stimuli_input_slew(const e_sim_signal_type& signal_t
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bool SimulationSetting::valid_signal_threshold(const float& threshold) const {
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bool SimulationSetting::valid_signal_threshold(const float& threshold) const {
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return (0. < threshold) && (threshold < 1);
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return (0. < threshold) && (threshold < 1);
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}
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}
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} /* namespace openfpga ends */
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/* Strings correspond to each accuracy type */
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/* Strings correspond to each accuracy type */
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constexpr std::array<const char*, NUM_SIM_ACCURACY_TYPES> SIM_ACCURACY_TYPE_STRING = {{"frac", "abs"}};
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constexpr std::array<const char*, NUM_SIM_ACCURACY_TYPES> SIM_ACCURACY_TYPE_STRING = {{"frac", "abs"}};
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/* namespace openfpga begins */
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namespace openfpga {
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/********************************************************************
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/********************************************************************
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* A data structure to describe simulation settings
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* A data structure to describe simulation settings
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*
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*
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@ -211,4 +214,6 @@ class SimulationSetting {
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std::array<float, NUM_SIM_ACCURACY_TYPES> input_slews_;
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std::array<float, NUM_SIM_ACCURACY_TYPES> input_slews_;
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};
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};
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} /* namespace openfpga ends */
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#endif
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#endif
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#include "write_xml_openfpga_arch.h"
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#include "write_xml_openfpga_arch.h"
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/********************************************************************
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/********************************************************************
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* A writer to output an OpenFPGAArch to XML format
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* A writer to output an OpenFPGA arch database to XML format
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*******************************************************************/
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*******************************************************************/
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void write_xml_openfpga_arch(const char* fname,
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void write_xml_openfpga_arch(const char* fname,
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const openfpga::Arch& openfpga_arch) {
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const openfpga::Arch& openfpga_arch) {
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/* Close the file stream */
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/* Close the file stream */
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fp.close();
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fp.close();
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}
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}
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/********************************************************************
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* A writer to output an OpenFPGA simulation setting database to XML format
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*******************************************************************/
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void write_xml_openfpga_simulation_settings(const char* fname,
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const openfpga::SimulationSetting& openfpga_sim_setting) {
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vtr::ScopedStartFinishTimer timer("Write OpenFPGA simulation settings");
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/* Create a file handler */
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std::fstream fp;
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/* Open the file stream */
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fp.open(std::string(fname), std::fstream::out | std::fstream::trunc);
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/* Validate the file stream */
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openfpga::check_file_stream(fname, fp);
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/* Write the simulation */
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write_xml_simulation_setting(fp, fname, openfpga_sim_setting);
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/* Close the file stream */
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fp.close();
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}
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void write_xml_openfpga_arch(const char* xml_fname,
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void write_xml_openfpga_arch(const char* xml_fname,
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const openfpga::Arch& openfpga_arch);
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const openfpga::Arch& openfpga_arch);
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void write_xml_openfpga_simulation_settings(const char* xml_fname,
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const openfpga::SimulationSetting& openfpga_sim_setting);
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#endif
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#endif
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static
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static
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void write_xml_clock_setting(std::fstream& fp,
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void write_xml_clock_setting(std::fstream& fp,
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const char* fname,
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const char* fname,
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const SimulationSetting& sim_setting) {
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const openfpga::SimulationSetting& sim_setting) {
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/* Validate the file stream */
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/* Validate the file stream */
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openfpga::check_file_stream(fname, fp);
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openfpga::check_file_stream(fname, fp);
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@ -53,7 +53,7 @@ void write_xml_clock_setting(std::fstream& fp,
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static
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static
|
||||||
void write_xml_simulator_option(std::fstream& fp,
|
void write_xml_simulator_option(std::fstream& fp,
|
||||||
const char* fname,
|
const char* fname,
|
||||||
const SimulationSetting& sim_setting) {
|
const openfpga::SimulationSetting& sim_setting) {
|
||||||
/* Validate the file stream */
|
/* Validate the file stream */
|
||||||
openfpga::check_file_stream(fname, fp);
|
openfpga::check_file_stream(fname, fp);
|
||||||
|
|
||||||
|
@ -87,7 +87,7 @@ void write_xml_simulator_option(std::fstream& fp,
|
||||||
static
|
static
|
||||||
void write_xml_monte_carlo(std::fstream& fp,
|
void write_xml_monte_carlo(std::fstream& fp,
|
||||||
const char* fname,
|
const char* fname,
|
||||||
const SimulationSetting& sim_setting) {
|
const openfpga::SimulationSetting& sim_setting) {
|
||||||
/* Validate the file stream */
|
/* Validate the file stream */
|
||||||
openfpga::check_file_stream(fname, fp);
|
openfpga::check_file_stream(fname, fp);
|
||||||
|
|
||||||
|
@ -111,7 +111,7 @@ void write_xml_monte_carlo(std::fstream& fp,
|
||||||
static
|
static
|
||||||
void write_xml_slew_measurement(std::fstream& fp,
|
void write_xml_slew_measurement(std::fstream& fp,
|
||||||
const char* fname,
|
const char* fname,
|
||||||
const SimulationSetting& sim_setting,
|
const openfpga::SimulationSetting& sim_setting,
|
||||||
const e_sim_signal_type& signal_type) {
|
const e_sim_signal_type& signal_type) {
|
||||||
/* Validate the file stream */
|
/* Validate the file stream */
|
||||||
openfpga::check_file_stream(fname, fp);
|
openfpga::check_file_stream(fname, fp);
|
||||||
|
@ -130,7 +130,7 @@ void write_xml_slew_measurement(std::fstream& fp,
|
||||||
static
|
static
|
||||||
void write_xml_delay_measurement(std::fstream& fp,
|
void write_xml_delay_measurement(std::fstream& fp,
|
||||||
const char* fname,
|
const char* fname,
|
||||||
const SimulationSetting& sim_setting,
|
const openfpga::SimulationSetting& sim_setting,
|
||||||
const e_sim_signal_type& signal_type) {
|
const e_sim_signal_type& signal_type) {
|
||||||
/* Validate the file stream */
|
/* Validate the file stream */
|
||||||
openfpga::check_file_stream(fname, fp);
|
openfpga::check_file_stream(fname, fp);
|
||||||
|
@ -149,7 +149,7 @@ void write_xml_delay_measurement(std::fstream& fp,
|
||||||
static
|
static
|
||||||
void write_xml_measurement(std::fstream& fp,
|
void write_xml_measurement(std::fstream& fp,
|
||||||
const char* fname,
|
const char* fname,
|
||||||
const SimulationSetting& sim_setting) {
|
const openfpga::SimulationSetting& sim_setting) {
|
||||||
/* Validate the file stream */
|
/* Validate the file stream */
|
||||||
openfpga::check_file_stream(fname, fp);
|
openfpga::check_file_stream(fname, fp);
|
||||||
|
|
||||||
|
@ -174,7 +174,7 @@ void write_xml_measurement(std::fstream& fp,
|
||||||
static
|
static
|
||||||
void write_xml_stimulus(std::fstream& fp,
|
void write_xml_stimulus(std::fstream& fp,
|
||||||
const char* fname,
|
const char* fname,
|
||||||
const SimulationSetting& sim_setting) {
|
const openfpga::SimulationSetting& sim_setting) {
|
||||||
/* Validate the file stream */
|
/* Validate the file stream */
|
||||||
openfpga::check_file_stream(fname, fp);
|
openfpga::check_file_stream(fname, fp);
|
||||||
|
|
||||||
|
@ -216,7 +216,7 @@ void write_xml_stimulus(std::fstream& fp,
|
||||||
*******************************************************************/
|
*******************************************************************/
|
||||||
void write_xml_simulation_setting(std::fstream& fp,
|
void write_xml_simulation_setting(std::fstream& fp,
|
||||||
const char* fname,
|
const char* fname,
|
||||||
const SimulationSetting& sim_setting) {
|
const openfpga::SimulationSetting& sim_setting) {
|
||||||
/* Validate the file stream */
|
/* Validate the file stream */
|
||||||
openfpga::check_file_stream(fname, fp);
|
openfpga::check_file_stream(fname, fp);
|
||||||
|
|
||||||
|
|
|
@ -12,6 +12,6 @@
|
||||||
*******************************************************************/
|
*******************************************************************/
|
||||||
void write_xml_simulation_setting(std::fstream& fp,
|
void write_xml_simulation_setting(std::fstream& fp,
|
||||||
const char* fname,
|
const char* fname,
|
||||||
const SimulationSetting& sim_setting);
|
const openfpga::SimulationSetting& sim_setting);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -1,37 +0,0 @@
|
||||||
/********************************************************************
|
|
||||||
* Unit test functions to validate the correctness of
|
|
||||||
* 1. parser of data structures
|
|
||||||
* 2. writer of data structures
|
|
||||||
*******************************************************************/
|
|
||||||
/* Headers from vtrutils */
|
|
||||||
#include "vtr_assert.h"
|
|
||||||
#include "vtr_log.h"
|
|
||||||
|
|
||||||
/* Headers from readarchopenfpga */
|
|
||||||
#include "check_circuit_library.h"
|
|
||||||
#include "read_xml_openfpga_arch.h"
|
|
||||||
#include "write_xml_openfpga_arch.h"
|
|
||||||
|
|
||||||
int main(int argc, const char** argv) {
|
|
||||||
/* Ensure we have only one or two argument */
|
|
||||||
VTR_ASSERT((2 == argc) || (3 == argc));
|
|
||||||
|
|
||||||
/* Parse the circuit library from an XML file */
|
|
||||||
const openfpga::Arch& openfpga_arch = read_xml_openfpga_arch(argv[1]);
|
|
||||||
VTR_LOG("Parsed %lu circuit models from XML into circuit library.\n",
|
|
||||||
openfpga_arch.circuit_lib.num_models());
|
|
||||||
|
|
||||||
/* Check the circuit library */
|
|
||||||
check_circuit_library(openfpga_arch.circuit_lib);
|
|
||||||
|
|
||||||
/* Output the circuit library to an XML file
|
|
||||||
* This is optional only used when there is a second argument
|
|
||||||
*/
|
|
||||||
if (3 <= argc) {
|
|
||||||
write_xml_openfpga_arch(argv[2], openfpga_arch);
|
|
||||||
VTR_LOG("Echo the OpenFPGA architecture to an XML file: %s.\n",
|
|
||||||
argv[2]);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue