riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

split simulation settings to a separated XML file

This commit is contained in:
tangxifan 2020-06-10 15:10:19 -06:00
parent b8bc74cc26
commit 15f087598c
13 changed files with 137 additions and 70 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
libopenfpga/libarchopenfpga/CMakeLists.txt
View File

@ -2,7 +2,7 @@ cmake_minimum_required(VERSION 3.9)
project("libarchopenfpga")
file(GLOB_RECURSE EXEC_SOURCES test/main.cpp)
file(GLOB_RECURSE EXEC_SOURCES test/*.cpp)
file(GLOB_RECURSE LIB_SOURCES src/*.cpp)
file(GLOB_RECURSE LIB_HEADERS src/*.h)
files_to_dirs(LIB_HEADERS LIB_INCLUDE_DIRS)
@ -26,13 +26,10 @@ target_link_libraries(libarchopenfpga
libpugiutil)
#Create the test executable
add_executable(read_arch_openfpga ${EXEC_SOURCES})
target_link_libraries(read_arch_openfpga libarchopenfpga)
#Supress IPO link warnings if IPO is enabled
get_target_property(READ_ARCH_USES_IPO read_arch_openfpga INTERPROCEDURAL_OPTIMIZATION)
if (READ_ARCH_USES_IPO)
set_target_properties(read_arch_openfpga PROPERTIES LINK_FLAGS ${IPO_LINK_WARN_SUPRESS_FLAGS})
endif()
install(TARGETS libarchopenfpga read_arch_openfpga DESTINATION bin)
foreach(testsourcefile ${EXEC_SOURCES})
# Use a simple string replace, to cut off .cpp.
get_filename_component(testname ${testsourcefile} NAME_WE)
add_executable(${testname} ${testsourcefile})
# Make sure the library is linked to each test executable
target_link_libraries(${testname} libarchopenfpga)
endforeach(testsourcefile ${EXEC_SOURCES})

36
libopenfpga/libarchopenfpga/arch/sample_simulation_setting.xml Normal file
View File

@ -0,0 +1,36 @@
<!-- An example of simulation settings, where we define the options
and process variations to be considered in simulations
-->
<openfpga_simulation_setting>
<clock_setting>
<operating frequency="200e6" num_cycles="auto" slack="0.2"/>
<programming frequency="10e6"/>
</clock_setting>
<simulator_option>
<operating_condition temperature="25"/>
<output_log verbose="false" captab="false"/>
<accuracy type="abs" value="1e-13"/>
<runtime fast_simulation="true"/>
</simulator_option>
<monte_carlo num_simulation_points="2"/>
<measurement_setting>
<slew>
<rise upper_thres_pct="0.95" lower_thres_pct="0.05"/>
<fall upper_thres_pct="0.05" lower_thres_pct="0.95"/>
</slew>
<delay>
<rise input_thres_pct="0.5" output_thres_pct="0.5"/>
<fall input_thres_pct="0.5" output_thres_pct="0.5"/>
</delay>
</measurement_setting>
<stimulus>
<clock>
<rise slew_type="abs" slew_time="20e-12" />
<fall slew_type="abs" slew_time="20e-12" />
</clock>
<input>
<rise slew_type="abs" slew_time="25e-12" />
<fall slew_type="abs" slew_time="25e-12" />
</input>
</stimulus>
</openfpga_simulation_setting>

32
libopenfpga/libarchopenfpga/src/read_xml_openfpga_arch.cpp
View File

@ -113,3 +113,35 @@ openfpga::Arch read_xml_openfpga_arch(const char* arch_file_name) {
return openfpga_arch;
}
/********************************************************************
* Top-level function to parse an XML file and load data to simulation settings
*******************************************************************/
openfpga::SimulationSetting read_xml_openfpga_simulation_settings(const char* sim_setting_file_name) {
vtr::ScopedStartFinishTimer timer("Read OpenFPGA simulation settings");
openfpga::SimulationSetting openfpga_sim_setting;
pugi::xml_node Next;
/* Parse the file */
pugi::xml_document doc;
pugiutil::loc_data loc_data;
try {
loc_data = pugiutil::load_xml(doc, sim_setting_file_name);
/* Second node should be <openfpga_simulation_setting> */
auto xml_simulation_settings = get_single_child(doc, "openfpga_simulation_setting", loc_data);
/* Parse simulation settings to data structure */
openfpga_sim_setting = read_xml_simulation_setting(xml_simulation_settings, loc_data);
} catch (pugiutil::XmlError& e) {
archfpga_throw(sim_setting_file_name, e.line(),
"%s", e.what());
}
return openfpga_sim_setting;
}

2
libopenfpga/libarchopenfpga/src/read_xml_openfpga_arch.h
View File

@ -12,4 +12,6 @@
*******************************************************************/
openfpga::Arch read_xml_openfpga_arch(const char* arch_file_name);
openfpga::SimulationSetting read_xml_openfpga_simulation_settings(const char* sim_setting_file_name);
#endif

20
libopenfpga/libarchopenfpga/src/read_xml_simulation_setting.cpp
View File

@ -40,7 +40,7 @@ e_sim_accuracy_type string_to_sim_accuracy_type(const std::string& type_string)
static
void read_xml_clock_setting(pugi::xml_node& xml_clock_setting,
const pugiutil::loc_data& loc_data,
SimulationSetting& sim_setting) {
openfpga::SimulationSetting& sim_setting) {
/* Parse operating clock setting */
pugi::xml_node xml_operating_clock_setting = get_single_child(xml_clock_setting, "operating", loc_data);
@ -73,7 +73,7 @@ void read_xml_clock_setting(pugi::xml_node& xml_clock_setting,
static
void read_xml_simulator_option(pugi::xml_node& xml_sim_option,
const pugiutil::loc_data& loc_data,
SimulationSetting& sim_setting) {
openfpga::SimulationSetting& sim_setting) {
pugi::xml_node xml_operating_condition = get_single_child(xml_sim_option, "operating_condition", loc_data);
sim_setting.set_simulation_temperature(get_attribute(xml_operating_condition, "temperature", loc_data).as_float(0.));
@ -119,7 +119,7 @@ void read_xml_simulator_option(pugi::xml_node& xml_sim_option,
static
void read_xml_monte_carlo(pugi::xml_node& xml_mc,
const pugiutil::loc_data& loc_data,
SimulationSetting& sim_setting) {
openfpga::SimulationSetting& sim_setting) {
sim_setting.set_monte_carlo_simulation_points(get_attribute(xml_mc, "num_simulation_points", loc_data).as_int(0));
}
@ -129,7 +129,7 @@ void read_xml_monte_carlo(pugi::xml_node& xml_mc,
static
void read_xml_measurement_setting(pugi::xml_node& xml_measurement,
const pugiutil::loc_data& loc_data,
SimulationSetting& sim_setting) {
openfpga::SimulationSetting& sim_setting) {
pugi::xml_node xml_slew = get_single_child(xml_measurement, "slew", loc_data);
pugi::xml_node xml_slew_rise = get_single_child(xml_slew, "rise", loc_data);
sim_setting.set_measure_slew_upper_threshold(SIM_SIGNAL_RISE, get_attribute(xml_slew_rise, "upper_thres_pct", loc_data).as_float(0.));
@ -155,7 +155,7 @@ void read_xml_measurement_setting(pugi::xml_node& xml_measurement,
static
void read_xml_stimulus_clock(pugi::xml_node& xml_stimuli_clock,
const pugiutil::loc_data& loc_data,
SimulationSetting& sim_setting,
openfpga::SimulationSetting& sim_setting,
const e_sim_signal_type& signal_type) {
/* Find the type of accuracy */
const char* type_attr = get_attribute(xml_stimuli_clock, "slew_type", loc_data).value();
@ -188,7 +188,7 @@ void read_xml_stimulus_clock(pugi::xml_node& xml_stimuli_clock,
static
void read_xml_stimulus_input(pugi::xml_node& xml_stimuli_input,
const pugiutil::loc_data& loc_data,
SimulationSetting& sim_setting,
openfpga::SimulationSetting& sim_setting,
const e_sim_signal_type& signal_type) {
/* Find the type of accuracy */
const char* type_attr = get_attribute(xml_stimuli_input, "slew_type", loc_data).value();
@ -221,7 +221,7 @@ void read_xml_stimulus_input(pugi::xml_node& xml_stimuli_input,
static
void read_xml_stimulus(pugi::xml_node& xml_stimulus,
const pugiutil::loc_data& loc_data,
SimulationSetting& sim_setting) {
openfpga::SimulationSetting& sim_setting) {
pugi::xml_node xml_clock = get_single_child(xml_stimulus, "clock", loc_data);
pugi::xml_node xml_clock_rise = get_single_child(xml_clock, "rise", loc_data);
read_xml_stimulus_clock(xml_clock_rise, loc_data, sim_setting, SIM_SIGNAL_RISE);
@ -240,9 +240,9 @@ void read_xml_stimulus(pugi::xml_node& xml_stimulus,
/********************************************************************
* Parse XML codes about <openfpga_simulation_setting> to an object of technology library
*******************************************************************/
SimulationSetting read_xml_simulation_setting(pugi::xml_node& Node,
const pugiutil::loc_data& loc_data) {
SimulationSetting sim_setting;
openfpga::SimulationSetting read_xml_simulation_setting(pugi::xml_node& Node,
const pugiutil::loc_data& loc_data) {
openfpga::SimulationSetting sim_setting;
/* Parse clock settings */
pugi::xml_node xml_clock_setting = get_single_child(Node, "clock_setting", loc_data);

5
libopenfpga/libarchopenfpga/src/read_xml_simulation_setting.h
View File

@ -11,7 +11,8 @@
/********************************************************************
* Function declaration
*******************************************************************/
SimulationSetting read_xml_simulation_setting(pugi::xml_node& Node,
const pugiutil::loc_data& loc_data);
openfpga::SimulationSetting read_xml_simulation_setting(pugi::xml_node& Node,
const pugiutil::loc_data& loc_data);
#endif

5
libopenfpga/libarchopenfpga/src/simulation_setting.cpp
View File

@ -2,6 +2,9 @@
#include "simulation_setting.h"
/* namespace openfpga begins */
namespace openfpga {
/************************************************************************
* Member functions for class SimulationSetting
***********************************************************************/
@ -208,3 +211,5 @@ void SimulationSetting::set_stimuli_input_slew(const e_sim_signal_type& signal_t
bool SimulationSetting::valid_signal_threshold(const float& threshold) const {
return (0. < threshold) && (threshold < 1);
}
} /* namespace openfpga ends */

5
libopenfpga/libarchopenfpga/src/simulation_setting.h
View File

@ -34,6 +34,9 @@ enum e_sim_accuracy_type {
/* Strings correspond to each accuracy type */
constexpr std::array<const char*, NUM_SIM_ACCURACY_TYPES> SIM_ACCURACY_TYPE_STRING = {{"frac", "abs"}};
/* namespace openfpga begins */
namespace openfpga {
/********************************************************************
* A data structure to describe simulation settings
*
@ -211,4 +214,6 @@ class SimulationSetting {
std::array<float, NUM_SIM_ACCURACY_TYPES> input_slews_;
};
} /* namespace openfpga ends */
#endif

24
libopenfpga/libarchopenfpga/src/write_xml_openfpga_arch.cpp
View File

@ -20,7 +20,7 @@
#include "write_xml_openfpga_arch.h"
/********************************************************************
* A writer to output an OpenFPGAArch to XML format
* A writer to output an OpenFPGA arch database to XML format
*******************************************************************/
void write_xml_openfpga_arch(const char* fname,
const openfpga::Arch& openfpga_arch) {
@ -69,3 +69,25 @@ void write_xml_openfpga_arch(const char* fname,
/* Close the file stream */
fp.close();
}
/********************************************************************
* A writer to output an OpenFPGA simulation setting database to XML format
*******************************************************************/
void write_xml_openfpga_simulation_settings(const char* fname,
const openfpga::SimulationSetting& openfpga_sim_setting) {
vtr::ScopedStartFinishTimer timer("Write OpenFPGA simulation settings");
/* Create a file handler */
std::fstream fp;
/* Open the file stream */
fp.open(std::string(fname), std::fstream::out | std::fstream::trunc);
/* Validate the file stream */
openfpga::check_file_stream(fname, fp);
/* Write the simulation */
write_xml_simulation_setting(fp, fname, openfpga_sim_setting);
/* Close the file stream */
fp.close();
}

4
libopenfpga/libarchopenfpga/src/write_xml_openfpga_arch.h
View File

@ -13,4 +13,8 @@
void write_xml_openfpga_arch(const char* xml_fname,
const openfpga::Arch& openfpga_arch);
void write_xml_openfpga_simulation_settings(const char* xml_fname,
const openfpga::SimulationSetting& openfpga_sim_setting);
#endif

16
libopenfpga/libarchopenfpga/src/write_xml_simulation_setting.cpp
View File

@ -20,7 +20,7 @@
static
void write_xml_clock_setting(std::fstream& fp,
const char* fname,
const SimulationSetting& sim_setting) {
const openfpga::SimulationSetting& sim_setting) {
/* Validate the file stream */
openfpga::check_file_stream(fname, fp);
@ -53,7 +53,7 @@ void write_xml_clock_setting(std::fstream& fp,
static
void write_xml_simulator_option(std::fstream& fp,
const char* fname,
const SimulationSetting& sim_setting) {
const openfpga::SimulationSetting& sim_setting) {
/* Validate the file stream */
openfpga::check_file_stream(fname, fp);
@ -87,7 +87,7 @@ void write_xml_simulator_option(std::fstream& fp,
static
void write_xml_monte_carlo(std::fstream& fp,
const char* fname,
const SimulationSetting& sim_setting) {
const openfpga::SimulationSetting& sim_setting) {
/* Validate the file stream */
openfpga::check_file_stream(fname, fp);
@ -111,7 +111,7 @@ void write_xml_monte_carlo(std::fstream& fp,
static
void write_xml_slew_measurement(std::fstream& fp,
const char* fname,
const SimulationSetting& sim_setting,
const openfpga::SimulationSetting& sim_setting,
const e_sim_signal_type& signal_type) {
/* Validate the file stream */
openfpga::check_file_stream(fname, fp);
@ -130,7 +130,7 @@ void write_xml_slew_measurement(std::fstream& fp,
static
void write_xml_delay_measurement(std::fstream& fp,
const char* fname,
const SimulationSetting& sim_setting,
const openfpga::SimulationSetting& sim_setting,
const e_sim_signal_type& signal_type) {
/* Validate the file stream */
openfpga::check_file_stream(fname, fp);
@ -149,7 +149,7 @@ void write_xml_delay_measurement(std::fstream& fp,
static
void write_xml_measurement(std::fstream& fp,
const char* fname,
const SimulationSetting& sim_setting) {
const openfpga::SimulationSetting& sim_setting) {
/* Validate the file stream */
openfpga::check_file_stream(fname, fp);
@ -174,7 +174,7 @@ void write_xml_measurement(std::fstream& fp,
static
void write_xml_stimulus(std::fstream& fp,
const char* fname,
const SimulationSetting& sim_setting) {
const openfpga::SimulationSetting& sim_setting) {
/* Validate the file stream */
openfpga::check_file_stream(fname, fp);
@ -216,7 +216,7 @@ void write_xml_stimulus(std::fstream& fp,
*******************************************************************/
void write_xml_simulation_setting(std::fstream& fp,
const char* fname,
const SimulationSetting& sim_setting) {
const openfpga::SimulationSetting& sim_setting) {
/* Validate the file stream */
openfpga::check_file_stream(fname, fp);

2
libopenfpga/libarchopenfpga/src/write_xml_simulation_setting.h
View File

@ -12,6 +12,6 @@
*******************************************************************/
void write_xml_simulation_setting(std::fstream& fp,
const char* fname,
const SimulationSetting& sim_setting);
const openfpga::SimulationSetting& sim_setting);
#endif

37
libopenfpga/libarchopenfpga/test/main.cpp
View File

@ -1,37 +0,0 @@
/********************************************************************
* Unit test functions to validate the correctness of
* 1. parser of data structures
* 2. writer of data structures
*******************************************************************/
/* Headers from vtrutils */
#include "vtr_assert.h"
#include "vtr_log.h"
/* Headers from readarchopenfpga */
#include "check_circuit_library.h"
#include "read_xml_openfpga_arch.h"
#include "write_xml_openfpga_arch.h"
int main(int argc, const char** argv) {
/* Ensure we have only one or two argument */
VTR_ASSERT((2 == argc) || (3 == argc));
/* Parse the circuit library from an XML file */
const openfpga::Arch& openfpga_arch = read_xml_openfpga_arch(argv[1]);
VTR_LOG("Parsed %lu circuit models from XML into circuit library.\n",
openfpga_arch.circuit_lib.num_models());
/* Check the circuit library */
check_circuit_library(openfpga_arch.circuit_lib);
/* Output the circuit library to an XML file
* This is optional only used when there is a second argument
*/
if (3 <= argc) {
write_xml_openfpga_arch(argv[2], openfpga_arch);
VTR_LOG("Echo the OpenFPGA architecture to an XML file: %s.\n",
argv[2]);
}
}