From 156cb800aa410765bcca71a921138dce0e5a98e7 Mon Sep 17 00:00:00 2001 From: tangxifan Date: Thu, 27 Jul 2023 12:22:16 -0700 Subject: [PATCH] [core] fixed a critical bug which causes wrong connections in tile modules --- openfpga/src/annotation/fabric_tile.cpp | 4 +-- openfpga/src/fabric/build_tile_modules.cpp | 29 ++++++++++++++++------ 2 files changed, 24 insertions(+), 9 deletions(-) diff --git a/openfpga/src/annotation/fabric_tile.cpp b/openfpga/src/annotation/fabric_tile.cpp index 43fddda72..0842a850e 100644 --- a/openfpga/src/annotation/fabric_tile.cpp +++ b/openfpga/src/annotation/fabric_tile.cpp @@ -241,11 +241,11 @@ bool FabricTile::cb_in_tile(const FabricTileId& tile_id, switch (cb_type) { case CHANX: return !cbx_coords_[tile_id].empty() && - find_cb_index_in_tile(tile_id, cb_type, coord) == + find_cb_index_in_tile(tile_id, cb_type, coord) != cbx_coords_[tile_id].size(); case CHANY: return !cby_coords_[tile_id].empty() && - find_cb_index_in_tile(tile_id, cb_type, coord) == + find_cb_index_in_tile(tile_id, cb_type, coord) != cby_coords_[tile_id].size(); default: VTR_LOG("Invalid type of connection block!\n"); diff --git a/openfpga/src/fabric/build_tile_modules.cpp b/openfpga/src/fabric/build_tile_modules.cpp index 3e53f07c1..20d61bd96 100644 --- a/openfpga/src/fabric/build_tile_modules.cpp +++ b/openfpga/src/fabric/build_tile_modules.cpp @@ -600,10 +600,17 @@ static int build_tile_module_port_and_nets_between_sb_and_cb( /* Check if the grid is inside the tile, if not, create ports */ if (fabric_tile.cb_in_tile(fabric_tile_id, cb_type, instance_gsb_cb_coordinate)) { + VTR_LOGV( + verbose, + "Skip adding ports to tile as connection block '%s' is part of the " + "tile along with the switch block '%s'...\n", + generate_connection_block_module_name(cb_type, instance_cb_coordinate) + .c_str(), + sb_module_name.c_str()); if (!frame_view) { size_t cb_instance = cb_instances.at(cb_type)[fabric_tile.find_cb_index_in_tile( - fabric_tile_id, cb_type, instance_cb_coordinate)]; + fabric_tile_id, cb_type, instance_gsb_cb_coordinate)]; for (size_t itrack = 0; itrack < module_sb.get_chan_width(side_manager.get_side()); @@ -1326,8 +1333,11 @@ static int build_tile_module( module_manager.add_configurable_child(tile_module, pb_module, pb_instance); } - VTR_LOGV(verbose, "Added programmable module '%s' to tile[%lu][%lu]\n", - pb_module_name.c_str(), tile_coord.x(), tile_coord.y()); + VTR_LOGV( + verbose, + "Added programmable module '%s' (instance: '%s') to tile[%lu][%lu]\n", + pb_module_name.c_str(), pb_instance_name.c_str(), tile_coord.x(), + tile_coord.y()); pb_instances.push_back(pb_instance); /* Add a custom I/O child with the grid */ module_manager.add_io_child( @@ -1371,8 +1381,10 @@ static int build_tile_module( cb_instance); } VTR_LOGV(verbose, - "Added connection block module '%s' to tile[%lu][%lu]\n", - cb_module_name.c_str(), tile_coord.x(), tile_coord.y()); + "Added connection block module '%s' (instance: '%s') to " + "tile[%lu][%lu]\n", + cb_module_name.c_str(), cb_instance_name.c_str(), tile_coord.x(), + tile_coord.y()); cb_instances[cb_type].push_back(cb_instance); } } @@ -1407,8 +1419,11 @@ static int build_tile_module( module_manager.add_configurable_child(tile_module, sb_module, sb_instance); } - VTR_LOGV(verbose, "Added switch block module '%s' to tile[%lu][%lu]\n", - sb_module_name.c_str(), tile_coord.x(), tile_coord.y()); + VTR_LOGV( + verbose, + "Added switch block module '%s' (instance: %s') to tile[%lu][%lu]\n", + sb_module_name.c_str(), sb_instance_name.c_str(), tile_coord.x(), + tile_coord.y()); sb_instances.push_back(sb_instance); }