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Merge pull request #1912 from lnis-uofu/xt_capn 

[core] unique block capn will update only on demand
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tangxifan 2024-11-27 00:20:45 -08:00 committed by GitHub
parent 0db095f8cd 174a81a777
commit 156afbe622
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GPG Key ID: B5690EEEBB952194
3 changed files with 12 additions and 6 deletions
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5
.github/workflows/build.yml vendored
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@ -210,6 +210,11 @@ jobs:
cxx: g++-11 cxx: g++-11
cmake_flags: "-DOPENFPGA_WITH_SWIG=OFF" cmake_flags: "-DOPENFPGA_WITH_SWIG=OFF"
dependency_version: "ubuntu22p04" dependency_version: "ubuntu22p04"
- name: "Build with capnproto update (Ubuntu 22.04)"
cc: gcc-11
cxx: g++-11
cmake_flags: "-DOPENFPGA_UPDATE_UNIQUE_BLOCK_CAPN=ON"
dependency_version: "ubuntu22p04"
# Define the steps to run the build job # Define the steps to run the build job
env: env:
CC: ${{ matrix.config.cc }} CC: ${{ matrix.config.cc }}

1
CMakeLists.txt
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@ -71,6 +71,7 @@ option(OPENFPGA_WITH_TEST "Enable testing build for codebase. Once enabled, make
option(OPENFPGA_WITH_VERSION "Enable version always-up-to-date when building codebase. Disable only when you do not care an accurate version number" ON) option(OPENFPGA_WITH_VERSION "Enable version always-up-to-date when building codebase. Disable only when you do not care an accurate version number" ON)
option(OPENFPGA_WITH_SWIG "Enable SWIG interface when building codebase. Disable when you do not need high-level interfaces, such as Tcl/Python" ON) option(OPENFPGA_WITH_SWIG "Enable SWIG interface when building codebase. Disable when you do not need high-level interfaces, such as Tcl/Python" ON)
option(OPENFPGA_ENABLE_STRICT_COMPILE "Specifies whether compiler warnings should be treated as errors (e.g. -Werror)" OFF) option(OPENFPGA_ENABLE_STRICT_COMPILE "Specifies whether compiler warnings should be treated as errors (e.g. -Werror)" OFF)
option(OPENFPGA_UPDATE_UNIQUE_BLOCK_CAPN "Specifies whether to update capn'proto files required by unique block. Recommend only after any modification on unique block parsers and data structures" OFF)
# Options pass on to VTR # Options pass on to VTR
set(WITH_ABC ON CACHE BOOL "Enable building ABC in Verilog-to-Routing") set(WITH_ABC ON CACHE BOOL "Enable building ABC in Verilog-to-Routing")

12
libs/libopenfpgacapnproto/CMakeLists.txt
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@ -32,11 +32,11 @@ add_library(libopenfpgacapnproto STATIC
${IC_SRCS} ${IC_SRCS}
) )
if (OPENFPGA_UPDATE_UNIQUE_BLOCK_CAPN)
add_dependencies(libopenfpgacapnproto add_dependencies(libopenfpgacapnproto
generate_unique_block_capnp generate_unique_block_capnp
) )
endif()
target_include_directories(libopenfpgacapnproto PUBLIC target_include_directories(libopenfpgacapnproto PUBLIC
${CMAKE_CURRENT_SOURCE_DIR} ${CMAKE_CURRENT_SOURCE_DIR}
@ -64,4 +64,4 @@ add_custom_target(
COMMAND ${CMAKE_COMMAND} -E copy unique_blocks_capnproto_generate/unique_blocks_uxsdcxx.capnp ${CMAKE_CURRENT_SOURCE_DIR}/gen COMMAND ${CMAKE_COMMAND} -E copy unique_blocks_capnproto_generate/unique_blocks_uxsdcxx.capnp ${CMAKE_CURRENT_SOURCE_DIR}/gen
DEPENDS ${CMAKE_CURRENT_SOURCE_DIR}/gen/unique_blocks.xsd DEPENDS ${CMAKE_CURRENT_SOURCE_DIR}/gen/unique_blocks.xsd
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR} WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
) )