add more methods to bitstream manager (renamed from bitstream context)
This commit is contained in:
tangxifan
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f26dbfe080
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13c62fdcf8
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@ -1,46 +0,0 @@
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/******************************************************************************
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* This file includes member functions for data structure BitstreamContext
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******************************************************************************/
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#include "vtr_assert.h"
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#include "bitstream_context.h"
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/**************************************************
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* Public Accessors : Aggregates
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*************************************************/
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/* Find all the configuration bits */
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BitstreamContext::config_bit_range BitstreamContext::bits() const {
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return vtr::make_range(bit_ids_.begin(), bit_ids_.end());
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}
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/******************************************************************************
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* Public Accessors
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******************************************************************************/
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bool BitstreamContext::bit_value(const ConfigBitId& bit_id) const {
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/* Ensure a valid id */
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VTR_ASSERT(true == valid_bit_id(bit_id));
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return bit_values_[bit_id];
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}
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/******************************************************************************
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* Public Mutators
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******************************************************************************/
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ConfigBitId BitstreamContext::add_bit(const bool& bit_value) {
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ConfigBitId bit = ConfigBitId(bit_ids_.size());
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/* Add a new bit, and allocate associated data structures */
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bit_ids_.push_back(bit);
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bit_values_.push_back(bit_value);
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shared_config_bit_values_.emplace_back();
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bit_parent_modules_.emplace_back();
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bit_parent_instances_.emplace_back();
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return bit;
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}
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/******************************************************************************
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* Public Validators
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******************************************************************************/
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bool BitstreamContext::valid_bit_id(const ConfigBitId& bit_id) const {
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return (size_t(bit_id) < bit_ids_.size()) && (bit_id == bit_ids_[bit_id]);
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}
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@ -1,58 +0,0 @@
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/******************************************************************************
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* This file introduces a data structure to store bitstream-related information
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******************************************************************************/
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#ifndef BITSTREAM_CONTEXT_H
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#define BITSTREAM_CONTEXT_H
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#include <vector>
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#include "vtr_vector.h"
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#include "module_manager.h"
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#include "bitstream_context_fwd.h"
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class BitstreamContext {
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public: /* Types and ranges */
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typedef vtr::vector<ConfigBitId, ConfigBitId>::const_iterator config_bit_iterator;
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typedef vtr::Range<config_bit_iterator> config_bit_range;
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public: /* Public aggregators */
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/* Find all the configuration bits */
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config_bit_range bits() const;
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public: /* Public Accessors */
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bool bit_value(const ConfigBitId& bit_id) const;
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public: /* Public Mutators */
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ConfigBitId add_bit(const bool& bit_value);
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public: /* Public Validators */
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bool valid_bit_id(const ConfigBitId& bit_id) const;
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private: /* Internal data */
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size_t num_shared_bits_; /* Number of reserved Bit/WL Lines, ONLY applicable to RRAM-based FPGA */
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/* Unique id of a bit in the Bitstream */
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vtr::vector<ConfigBitId, ConfigBitId> bit_ids_;
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/* value of a bit in the Bitstream */
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vtr::vector<ConfigBitId, bool> bit_values_;
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/* value of a shared configuration bits in the Bitstream */
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vtr::vector<ConfigBitId, std::vector<bool>> shared_config_bit_values_;
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/* Back-annotation for the bits */
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/* Parent Module of a bit in the Bitstream
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* For each bit, the list of ModuleId and instance ids reflect its position in the module tree
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* The first ModuleId/Instance is the direct parent module/instance of the bit
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* while the last ModuleId/instance is the top-level module/instance of the bit
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* For example: a bit could be back traced by
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* <LastModuleId>[<LastInstanceId>]/.../<FirstModuleId>[<FirstInstanceId>]
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*/
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vtr::vector<ConfigBitId, std::vector<ModuleId>> bit_parent_modules_;
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vtr::vector<ConfigBitId, std::vector<size_t>> bit_parent_instances_;
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/* Fast lookup for bitstream */
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std::map<std::string, ConfigBitId> bit_lookup_;
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};
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#endif
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@ -0,0 +1,141 @@
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/******************************************************************************
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* This file includes member functions for data structure BitstreamManager
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******************************************************************************/
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#include <algorithm>
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#include "vtr_assert.h"
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#include "bitstream_manager.h"
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/**************************************************
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* Public Accessors : Aggregates
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*************************************************/
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/* Find all the configuration bits */
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BitstreamManager::config_bit_range BitstreamManager::bits() const {
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return vtr::make_range(bit_ids_.begin(), bit_ids_.end());
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}
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/* Find all the configuration blocks */
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BitstreamManager::config_block_range BitstreamManager::blocks() const {
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return vtr::make_range(block_ids_.begin(), block_ids_.end());
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}
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/******************************************************************************
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* Public Accessors
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******************************************************************************/
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bool BitstreamManager::bit_value(const ConfigBitId& bit_id) const {
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/* Ensure a valid id */
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VTR_ASSERT(true == valid_bit_id(bit_id));
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return bit_values_[bit_id];
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}
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std::string BitstreamManager::block_name(const ConfigBlockId& block_id) const {
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/* Ensure the input ids are valid */
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VTR_ASSERT(true == valid_block_id(block_id));
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return block_names_[block_id];
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}
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ConfigBlockId BitstreamManager::block_parent(const ConfigBlockId& block_id) const {
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/* Ensure the input ids are valid */
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VTR_ASSERT(true == valid_block_id(block_id));
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return parent_block_ids_[block_id];
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}
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std::vector<ConfigBlockId> BitstreamManager::block_children(const ConfigBlockId& block_id) const {
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/* Ensure the input ids are valid */
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VTR_ASSERT(true == valid_block_id(block_id));
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return child_block_ids_[block_id];
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}
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std::vector<ConfigBitId> BitstreamManager::block_bits(const ConfigBlockId& block_id) const {
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/* Ensure the input ids are valid */
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VTR_ASSERT(true == valid_block_id(block_id));
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return block_bit_ids_[block_id];
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}
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ConfigBlockId BitstreamManager::bit_parent_block(const ConfigBitId& bit_id) const {
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/* Ensure the input ids are valid */
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VTR_ASSERT(true == valid_bit_id(bit_id));
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return bit_parent_block_ids_[bit_id];
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}
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/******************************************************************************
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* Public Mutators
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******************************************************************************/
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ConfigBitId BitstreamManager::add_bit(const bool& bit_value) {
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ConfigBitId bit = ConfigBitId(bit_ids_.size());
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/* Add a new bit, and allocate associated data structures */
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bit_ids_.push_back(bit);
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bit_values_.push_back(bit_value);
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shared_config_bit_values_.emplace_back();
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bit_parent_block_ids_.push_back(ConfigBlockId::INVALID());
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return bit;
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}
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ConfigBlockId BitstreamManager::add_block(const std::string& block_name) {
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ConfigBlockId block = ConfigBlockId(block_ids_.size());
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/* Add a new bit, and allocate associated data structures */
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block_ids_.push_back(block);
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block_names_.push_back(block_name);
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block_bit_ids_.emplace_back();
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parent_block_ids_.push_back(ConfigBlockId::INVALID());
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child_block_ids_.emplace_back();
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return block;
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}
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void BitstreamManager::add_child_block(const ConfigBlockId& parent_block, const ConfigBlockId& child_block) {
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/* Ensure the input ids are valid */
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VTR_ASSERT(true == valid_block_id(parent_block));
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VTR_ASSERT(true == valid_block_id(child_block));
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/* We should have only a parent block for each block! */
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VTR_ASSERT(ConfigBlockId::INVALID() == parent_block_ids_[child_block]);
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/* Ensure the child block is not in the list of children of the parent block */
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std::vector<ConfigBlockId>::iterator it = std::find(child_block_ids_[parent_block].begin(), child_block_ids_[parent_block].end(), child_block);
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VTR_ASSERT(it == child_block_ids_[parent_block].end());
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/* Add the child_block to the parent_block */
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child_block_ids_[parent_block].push_back(child_block);
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/* Register the block in the parent of the block */
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parent_block_ids_[child_block] = parent_block;
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}
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void BitstreamManager::add_bit_to_block(const ConfigBlockId& block, const ConfigBitId& bit) {
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/* Ensure the input ids are valid */
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VTR_ASSERT(true == valid_block_id(block));
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VTR_ASSERT(true == valid_bit_id(bit));
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/* We should have only a parent block for each bit! */
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VTR_ASSERT(ConfigBlockId::INVALID() == bit_parent_block_ids_[bit]);
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/* Add the bit to the block */
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block_bit_ids_[block].push_back(bit);
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/* Register the block in the parent of the bit */
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bit_parent_block_ids_[bit] = block;
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}
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void BitstreamManager::add_shared_config_bit_values(const ConfigBitId& bit, const std::vector<bool>& shared_config_bits) {
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/* Ensure the input ids are valid */
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VTR_ASSERT(true == valid_bit_id(bit));
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shared_config_bit_values_[bit] = shared_config_bits;
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}
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/******************************************************************************
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* Public Validators
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******************************************************************************/
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bool BitstreamManager::valid_bit_id(const ConfigBitId& bit_id) const {
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return (size_t(bit_id) < bit_ids_.size()) && (bit_id == bit_ids_[bit_id]);
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}
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bool BitstreamManager::valid_block_id(const ConfigBlockId& block_id) const {
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return (size_t(block_id) < block_ids_.size()) && (block_id == block_ids_[block_id]);
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}
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/******************************************************************************
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* This file introduces a data structure to store bitstream-related information
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*
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* General concept
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* ---------------
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* The idea is to create a unified data structure that stores all the configuration bits
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* with proper annotation to which modules in FPGA fabric it belongs to.
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* 1. It can be easily organized in fabric-dependent representation
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* (generate a sequence of bitstream which exactly fit the configuration protocol of FPGA fabric)
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* 2. Or it can be easily organized in fabric-independent representation (think about XML file)
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*
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* Cross-reference
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* ---------------
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* May be used only when you want to bind the bitstream to a specific FPGA fabric!
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* If you do so, please make sure the block name is exactly same as the instance name
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* of a child module in ModuleManager!!!
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* The configurable modules/instances in module manager are arranged
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* in the sequence to fit different configuration protocol.
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* By using the link between ModuleManager and BitstreamManager,
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* we can build a sequence of configuration bits to fit different configuration protocols.
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*
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* +------------------+ +-----------------+
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* | | block_name == instance_name | |
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* | BitstreamManager |-------------------------------->| ModuleManager |
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* | | | |
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* +------------------+ +-----------------+
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*
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* Restrictions:
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* 1. Each block inside BitstreamManager should have only 1 parent block
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* and multiple child block
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* 2. Each bit inside BitstreamManager should have only 1 parent block
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*
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******************************************************************************/
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#ifndef BITSTREAM_MANAGER_H
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#define BITSTREAM_MANAGER_H
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#include <vector>
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#include "vtr_vector.h"
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#include "bitstream_manager_fwd.h"
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class BitstreamManager {
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public: /* Types and ranges */
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typedef vtr::vector<ConfigBitId, ConfigBitId>::const_iterator config_bit_iterator;
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typedef vtr::vector<ConfigBlockId, ConfigBlockId>::const_iterator config_block_iterator;
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typedef vtr::Range<config_bit_iterator> config_bit_range;
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typedef vtr::Range<config_block_iterator> config_block_range;
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public: /* Public aggregators */
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/* Find all the configuration bits */
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config_bit_range bits() const;
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config_block_range blocks() const;
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public: /* Public Accessors */
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/* Find the value of bitstream */
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bool bit_value(const ConfigBitId& bit_id) const;
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/* Find a name of a block */
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std::string block_name(const ConfigBlockId& block_id) const;
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/* Find the parent of a block */
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ConfigBlockId block_parent(const ConfigBlockId& block_id) const;
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/* Find the children of a block */
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std::vector<ConfigBlockId> block_children(const ConfigBlockId& block_id) const;
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/* Find all the bits that belong to a block */
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std::vector<ConfigBitId> block_bits(const ConfigBlockId& block_id) const;
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/* Find the parent block of a bit */
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ConfigBlockId bit_parent_block(const ConfigBitId& bit_id) const;
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public: /* Public Mutators */
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/* Add a new configuration bit to the bitstream manager */
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ConfigBitId add_bit(const bool& bit_value);
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/* Add a new block of configuration bits to the bitstream manager */
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ConfigBlockId add_block(const std::string& block_name);
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/* Set a block as a child block of another */
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void add_child_block(const ConfigBlockId& parent_block, const ConfigBlockId& child_block);
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/* Add a configuration bit to a block */
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void add_bit_to_block(const ConfigBlockId& block, const ConfigBitId& bit);
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/* Add share configuration bits to a configuration bit */
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void add_shared_config_bit_values(const ConfigBitId& bit, const std::vector<bool>& shared_config_bits);
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public: /* Public Validators */
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bool valid_bit_id(const ConfigBitId& bit_id) const;
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bool valid_block_id(const ConfigBlockId& block_id) const;
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private: /* Internal data */
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/* Unique id of a block of bits in the Bitstream */
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vtr::vector<ConfigBlockId, ConfigBlockId> block_ids_;
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vtr::vector<ConfigBlockId, std::vector<ConfigBitId>> block_bit_ids_;
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/* Back-annotation for the bits */
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/* Parent block of a bit in the Bitstream
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* For each bit, the block name can be designed to be same as the instance name in a module
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* to reflect its position in the module tree (ModuleManager)
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* Note that the blocks here all unique, unlike ModuleManager where modules can be instanciated
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* Therefore, this block graph can be considered as a flattened graph of ModuleGraph
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*/
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vtr::vector<ConfigBlockId, std::string> block_names_;
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vtr::vector<ConfigBlockId, ConfigBlockId> parent_block_ids_;
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vtr::vector<ConfigBlockId, std::vector<ConfigBlockId>> child_block_ids_;
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/* Unique id of a bit in the Bitstream */
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vtr::vector<ConfigBitId, ConfigBitId> bit_ids_;
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vtr::vector<ConfigBitId, ConfigBlockId> bit_parent_block_ids_;
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/* value of a bit in the Bitstream */
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vtr::vector<ConfigBitId, bool> bit_values_;
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/* value of a shared configuration bits in the Bitstream */
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vtr::vector<ConfigBitId, std::vector<bool>> shared_config_bit_values_;
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};
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#endif
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@ -1,18 +1,20 @@
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/**************************************************
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* This file includes only declarations for
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* the data structures for bitstream database
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* Please refer to bitstream_context.h for more details
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* Please refer to bitstream_manager.h for more details
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*************************************************/
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#ifndef BITSTREAM_CONTEXT_FWD_H
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#define BITSTREAM_CONTEXT_MANAGER_FWD_H
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#ifndef BITSTREAM_MANAGER_FWD_H
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#define BITSTREAM_MANAGER_FWD_H
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#include "vtr_strong_id.h"
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/* Strong Ids for BitstreamContext */
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struct config_block_id_tag;
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struct config_bit_id_tag;
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typedef vtr::StrongId<config_block_id_tag> ConfigBlockId;
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typedef vtr::StrongId<config_bit_id_tag> ConfigBitId;
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class BitstreamContext;
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class BitstreamManager;
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#endif
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