Added dockerignore + minor changes in openfpga_flow script

This commit is contained in:
Ganesh Gore 2019-08-17 16:22:52 -06:00
parent 66bb8a5e4b
commit 12c998c12a
4 changed files with 16 additions and 7 deletions

2
.dockerignore Normal file
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@ -0,0 +1,2 @@
# Ignore everything
*

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@ -7,9 +7,9 @@ RUN apt-get -y install autoconf automake bison build-essential cmake ctags curl
RUN mkdir -p /release /dev RUN mkdir -p /release /dev
RUN cd release && git clone --single-branch --branch documentation https://github.com/LNIS-Projects/OpenFPGA.git OpenFPGA RUN cd release && git clone --single-branch --branch master https://github.com/LNIS-Projects/OpenFPGA.git OpenFPGA
RUN cd /release/OpenFPGA && mkdir build && cd build && cmake .. -CMAKE_BUILD_TYPE=debug && make RUN cd /release/OpenFPGA && mkdir build && cd build && cmake .. -DCMAKE_BUILD_TYPE=debug -DCMAKE_NO_GRAPHICS=on && make -j
RUN rm -rf /var/lib/apt/lists/* RUN rm -rf /var/lib/apt/lists/*

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@ -507,7 +507,7 @@ def run_vpr():
logger.info("Routing with channel width=%d successful" % logger.info("Routing with channel width=%d successful" %
min_channel_width) min_channel_width)
break break
elif args.min_channel_width > (min_channel_width-2): elif args.max_route_width_retry < (min_channel_width-2):
clean_up_and_exit("Failed to route within maximum " + clean_up_and_exit("Failed to route within maximum " +
"iteration of channel width") "iteration of channel width")
else: else:
@ -663,8 +663,9 @@ def run_standard_vpr(bench_blif, fixed_chan_width, logfile):
if process.returncode: if process.returncode:
logger.info("Standard VPR run failed with returncode %d", logger.info("Standard VPR run failed with returncode %d",
process.returncode) process.returncode)
except: except Exception as e:
logger.exception("Failed to run VPR") logger.exception("Failed to run VPR")
process_failed_vpr_run(e.output)
clean_up_and_exit("") clean_up_and_exit("")
logger.info("VPR output is written in file %s" % logfile) logger.info("VPR output is written in file %s" % logfile)
return int(chan_width) return int(chan_width)
@ -816,7 +817,8 @@ def run_netlists_verification():
command = [cad_tools["iverilog_path"]] command = [cad_tools["iverilog_path"]]
command += ["-o", compiled_file] command += ["-o", compiled_file]
command += [cad_tools["include_netlist_verification"]] command += ["./SRC/%s_ace_corrected_out_include_netlists.v" %
args.top_module]
command += ["-s"] command += ["-s"]
if args.vpr_fpga_verilog_formal_verification_top_netlist: if args.vpr_fpga_verilog_formal_verification_top_netlist:
command += [tb_top_formal] command += [tb_top_formal]
@ -841,8 +843,9 @@ def run_command(taskname, logfile, command, exit_if_fail=True):
if process.returncode: if process.returncode:
logger.error("%s run failed with returncode %d" % logger.error("%s run failed with returncode %d" %
(taskname, process.returncode)) (taskname, process.returncode))
except: except Exception as e:
logger.exception() logger.exception("failed to execute %s" % taskname)
process_failed_vpr_run(e.output)
if exit_if_fail: if exit_if_fail:
clean_up_and_exit("Failed to run %s task" % taskname) clean_up_and_exit("Failed to run %s task" % taskname)
logger.info("%s is written in file %s" % (taskname, logfile)) logger.info("%s is written in file %s" % (taskname, logfile))
@ -860,6 +863,7 @@ def process_failed_vpr_run(vpr_output):
if "error" in line.lower(): if "error" in line.lower():
logger.error("-->>" + line) logger.error("-->>" + line)
if __name__ == "__main__": if __name__ == "__main__":
# Setting up print and logging system # Setting up print and logging system
logging.basicConfig(level=logging.INFO, stream=sys.stdout, logging.basicConfig(level=logging.INFO, stream=sys.stdout,

3
run_local.sh Normal file
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@ -0,0 +1,3 @@
#!/bin/bash
docker run -it --rm -v "${PWD}":/root/dev/OpenFPGA -w="/root/dev/OpenFPGA" goreganesh/open_fpga bash
pause