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critical bug fixing for compact routing hierarchy and top module generation

This commit is contained in:
tangxifan 2019-10-23 14:20:04 -06:00
parent fb2f003d5b
commit 12162a02bc
4 changed files with 62 additions and 57 deletions
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25
vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_setup.c
View File

@ -1427,20 +1427,21 @@ void fpga_x2p_setup(t_vpr_setup vpr_setup,
/* Idenify mirror and rotatable Switch blocks and Connection blocks */
identify_mirror_switch_blocks();
identify_mirror_connection_blocks();
/* Assign Gobal variable: build the Routing Resource Channels */
device_rr_chan = build_device_rr_chan(num_rr_nodes, rr_node, rr_node_indices, Arch->num_segments, rr_indexed_data);
device_rr_gsb = build_device_rr_gsb(vpr_setup.FPGA_SPICE_Opts.output_sb_xml,
vpr_setup.FPGA_SPICE_Opts.sb_xml_dir,
num_rr_nodes, rr_node, rr_node_indices,
Arch->num_segments, rr_indexed_data);
/* Rotatable will be done in the next step
identify_rotatable_switch_blocks();
identify_rotatable_connection_blocks();
*/
}
/* Assign Gobal variable: build the Routing Resource Channels */
device_rr_chan = build_device_rr_chan(num_rr_nodes, rr_node, rr_node_indices, Arch->num_segments, rr_indexed_data);
device_rr_gsb = build_device_rr_gsb(TRUE == vpr_setup.FPGA_SPICE_Opts.output_sb_xml,
TRUE == vpr_setup.FPGA_SPICE_Opts.compact_routing_hierarchy,
vpr_setup.FPGA_SPICE_Opts.sb_xml_dir,
num_rr_nodes, rr_node, rr_node_indices,
Arch->num_segments, rr_indexed_data);
/* Rotatable will be done in the next step
identify_rotatable_switch_blocks();
identify_rotatable_connection_blocks();
*/
/* Not should be done when read_act_file is disabled */
if (FALSE == vpr_setup.FPGA_SPICE_Opts.read_act_file) {
return;

84
vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_unique_routing.c
View File

@ -1318,9 +1318,11 @@ void sort_rr_gsb_drive_rr_nodes(const RRGSB& rr_gsb) {
* Each switch block in the FPGA fabric will be an instance of these modules.
* We maintain a map from each instance to each module
*/
DeviceRRGSB build_device_rr_gsb(boolean output_sb_xml, char* sb_xml_dir,
int LL_num_rr_nodes, t_rr_node* LL_rr_node,
t_ivec*** LL_rr_node_indices, int num_segments,
DeviceRRGSB build_device_rr_gsb(const bool& output_sb_xml,
const bool& compact_routing_hierarchy,
char* sb_xml_dir,
const int& LL_num_rr_nodes, t_rr_node* LL_rr_node,
t_ivec*** LL_rr_node_indices, const int& num_segments,
t_rr_indexed_data* LL_rr_indexed_data) {
/* Timer */
clock_t t_start;
@ -1382,9 +1384,7 @@ DeviceRRGSB build_device_rr_gsb(boolean output_sb_xml, char* sb_xml_dir,
vpr_printf(TIO_MESSAGE_INFO, "Edge sorting for Switch Block took %g seconds\n", run_time_sec_profiling);
vpr_printf(TIO_MESSAGE_INFO, "Backannotation of Switch Block took %g seconds\n\n", run_time_sec);
if (TRUE == output_sb_xml) {
if (true == output_sb_xml) {
create_dir_path(sb_xml_dir);
write_device_rr_gsb_to_xml(sb_xml_dir, LL_device_rr_gsb);
@ -1397,42 +1397,44 @@ DeviceRRGSB build_device_rr_gsb(boolean output_sb_xml, char* sb_xml_dir,
/* Build a list of unique modules for each Switch Block */
/* Build a list of unique modules for each side of each Switch Block */
LL_device_rr_gsb.build_unique_module();
if (true == compact_routing_hierarchy) {
LL_device_rr_gsb.build_unique_module();
vpr_printf(TIO_MESSAGE_INFO,
"Detect %lu routing segments used by switch blocks.\n",
LL_device_rr_gsb.get_num_segments());
vpr_printf(TIO_MESSAGE_INFO,
"Detect %lu routing segments used by switch blocks.\n",
LL_device_rr_gsb.get_num_segments());
/* Report number of unique CB Modules */
vpr_printf(TIO_MESSAGE_INFO,
"Detect %d unique connection blocks from %d X-channel connection blocks.\n",
LL_device_rr_gsb.get_num_cb_unique_module(CHANX), (nx + 0) * (ny + 1) );
vpr_printf(TIO_MESSAGE_INFO,
"Detect %d unique connection blocks from %d Y-channel connection blocks.\n",
LL_device_rr_gsb.get_num_cb_unique_module(CHANY), (nx + 1) * (ny + 0) );
/* Report number of unique SB modules */
vpr_printf(TIO_MESSAGE_INFO,
"Detect %d unique switch blocks from %d switch blocks.\n",
LL_device_rr_gsb.get_num_sb_unique_module(), (nx + 1) * (ny + 1) );
/* Report number of unique GSB modules */
vpr_printf(TIO_MESSAGE_INFO,
"Detect %d unique GSBs from %d GSBs.\n",
LL_device_rr_gsb.get_num_sb_unique_module(), (nx + 1) * (ny + 1) );
/* Report number of unique CB Modules */
vpr_printf(TIO_MESSAGE_INFO,
"Detect %d unique connection blocks from %d X-channel connection blocks.\n",
LL_device_rr_gsb.get_num_cb_unique_module(CHANX), (nx + 0) * (ny + 1) );
vpr_printf(TIO_MESSAGE_INFO,
"Detect %d unique connection blocks from %d Y-channel connection blocks.\n",
LL_device_rr_gsb.get_num_cb_unique_module(CHANY), (nx + 1) * (ny + 0) );
/* Report number of unique SB modules */
vpr_printf(TIO_MESSAGE_INFO,
"Detect %d unique switch blocks from %d switch blocks.\n",
LL_device_rr_gsb.get_num_sb_unique_module(), (nx + 1) * (ny + 1) );
/* Report number of unique GSB modules */
vpr_printf(TIO_MESSAGE_INFO,
"Detect %d unique GSBs from %d GSBs.\n",
LL_device_rr_gsb.get_num_sb_unique_module(), (nx + 1) * (ny + 1) );
/* Report number of unique mirrors */
for (size_t side = 0; side < LL_device_rr_gsb.get_max_num_sides(); ++side) {
Side side_manager(side);
/* get segment ids */
for (size_t iseg = 0; iseg < LL_device_rr_gsb.get_num_segments(); ++iseg) {
vpr_printf(TIO_MESSAGE_INFO,
"For side %s, segment id %lu: Detect %d independent switch blocks from %d switch blocks.\n",
side_manager.c_str(), LL_device_rr_gsb.get_segment_id(iseg),
LL_device_rr_gsb.get_num_sb_unique_submodule(side_manager.get_side(), iseg),
(nx + 1) * (ny + 1) );
/* Report number of unique mirrors */
for (size_t side = 0; side < LL_device_rr_gsb.get_max_num_sides(); ++side) {
Side side_manager(side);
/* get segment ids */
for (size_t iseg = 0; iseg < LL_device_rr_gsb.get_num_segments(); ++iseg) {
vpr_printf(TIO_MESSAGE_INFO,
"For side %s, segment id %lu: Detect %d independent switch blocks from %d switch blocks.\n",
side_manager.c_str(), LL_device_rr_gsb.get_segment_id(iseg),
LL_device_rr_gsb.get_num_sb_unique_submodule(side_manager.get_side(), iseg),
(nx + 1) * (ny + 1) );
}
}
}
@ -1440,7 +1442,7 @@ DeviceRRGSB build_device_rr_gsb(boolean output_sb_xml, char* sb_xml_dir,
t_end = clock();
run_time_sec = (float)(t_end - t_start) / CLOCKS_PER_SEC;
vpr_printf(TIO_MESSAGE_INFO, "Routing architecture uniqifying took %g seconds\n\n", run_time_sec);
vpr_printf(TIO_MESSAGE_INFO, "Routing architecture uniquifying took %g seconds\n\n", run_time_sec);
return LL_device_rr_gsb;
}

8
vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_unique_routing.h
View File

@ -14,9 +14,11 @@ DeviceRRChan build_device_rr_chan(int LL_num_rr_nodes, t_rr_node* LL_rr_node,
* Each switch block in the FPGA fabric will be an instance of these modules.
* We maintain a map from each instance to each module
*/
DeviceRRGSB build_device_rr_gsb(boolean output_sb_xml, char* sb_xml_dir,
int LL_num_rr_nodes, t_rr_node* LL_rr_node,
t_ivec*** LL_rr_node_indices, int num_segments,
DeviceRRGSB build_device_rr_gsb(const bool& output_sb_xml,
const bool& compact_routing_hierarchy,
char* sb_xml_dir,
const int& LL_num_rr_nodes, t_rr_node* LL_rr_node,
t_ivec*** LL_rr_node_indices, const int& num_segments,
t_rr_indexed_data* LL_rr_indexed_data);
/* Rotatable will be done in the next step

2
vpr7_x2p/vpr/SRC/fpga_x2p/module_builder/build_top_module.cpp
View File

@ -241,7 +241,7 @@ std::vector<std::vector<size_t>> add_top_module_switch_block_instances(ModuleMan
for (size_t iy = 0; iy < sb_range.get_y(); ++iy) {
/* If we use compact routing hierarchy, we should instanciate the unique module of SB */
const RRGSB& rr_gsb = L_device_rr_gsb.get_gsb(ix, iy);
vtr::Point<size_t> sb_coordinate(rr_gsb.get_sb_x(), rr_gsb.get_sb_x());
vtr::Point<size_t> sb_coordinate(rr_gsb.get_sb_x(), rr_gsb.get_sb_y());
if (true == compact_routing_hierarchy) {
DeviceCoordinator sb_coord(ix, iy);
const RRGSB& unique_mirror = L_device_rr_gsb.get_sb_unique_module(sb_coord);